func(s *state, n *Node, args []*ssa.Value) *ssa.Value {
return s.newValue1(ssa.OpRound, types.Types[TFLOAT64], args[0])
},
- sys.ARM64, sys.S390X)
+ sys.ARM64, sys.PPC64, sys.S390X)
addF("math", "RoundToEven",
func(s *state, n *Node, args []*ssa.Value) *ssa.Value {
return s.newValue1(ssa.OpRoundToEven, types.Types[TFLOAT64], args[0])
p.To.Type = obj.TYPE_REG
p.To.Reg = ppc64.REGTMP // Ignored; this is for the carry effect.
- case ssa.OpPPC64NEG, ssa.OpPPC64FNEG, ssa.OpPPC64FSQRT, ssa.OpPPC64FSQRTS, ssa.OpPPC64FFLOOR, ssa.OpPPC64FTRUNC, ssa.OpPPC64FCEIL, ssa.OpPPC64FCTIDZ, ssa.OpPPC64FCTIWZ, ssa.OpPPC64FCFID, ssa.OpPPC64FCFIDS, ssa.OpPPC64FRSP, ssa.OpPPC64CNTLZD, ssa.OpPPC64CNTLZW, ssa.OpPPC64POPCNTD, ssa.OpPPC64POPCNTW, ssa.OpPPC64POPCNTB, ssa.OpPPC64MFVSRD, ssa.OpPPC64MTVSRD, ssa.OpPPC64FABS, ssa.OpPPC64FNABS:
+ case ssa.OpPPC64NEG, ssa.OpPPC64FNEG, ssa.OpPPC64FSQRT, ssa.OpPPC64FSQRTS, ssa.OpPPC64FFLOOR, ssa.OpPPC64FTRUNC, ssa.OpPPC64FCEIL, ssa.OpPPC64FCTIDZ, ssa.OpPPC64FCTIWZ, ssa.OpPPC64FCFID, ssa.OpPPC64FCFIDS, ssa.OpPPC64FRSP, ssa.OpPPC64CNTLZD, ssa.OpPPC64CNTLZW, ssa.OpPPC64POPCNTD, ssa.OpPPC64POPCNTW, ssa.OpPPC64POPCNTB, ssa.OpPPC64MFVSRD, ssa.OpPPC64MTVSRD, ssa.OpPPC64FABS, ssa.OpPPC64FNABS, ssa.OpPPC64FROUND:
r := v.Reg()
p := s.Prog(v.Op.Asm())
p.To.Type = obj.TYPE_REG
(Floor x) -> (FFLOOR x)
(Ceil x) -> (FCEIL x)
(Trunc x) -> (FTRUNC x)
+(Round x) -> (FROUND x)
(Copysign x y) -> (FCPSGN y x)
(Abs x) -> (FABS x)
{name: "FFLOOR", argLength: 1, reg: fp11, asm: "FRIM"}, // floor(arg0), float64
{name: "FCEIL", argLength: 1, reg: fp11, asm: "FRIP"}, // ceil(arg0), float64
{name: "FTRUNC", argLength: 1, reg: fp11, asm: "FRIZ"}, // trunc(arg0), float64
+ {name: "FROUND", argLength: 1, reg: fp11, asm: "FRIN"}, // round(arg0), float64
{name: "FABS", argLength: 1, reg: fp11, asm: "FABS"}, // abs(arg0), float64
{name: "FNABS", argLength: 1, reg: fp11, asm: "FNABS"}, // -abs(arg0), float64
{name: "FCPSGN", argLength: 2, reg: fp21, asm: "FCPSGN"}, // copysign arg0 -> arg1, float64
OpPPC64FFLOOR
OpPPC64FCEIL
OpPPC64FTRUNC
+ OpPPC64FROUND
OpPPC64FABS
OpPPC64FNABS
OpPPC64FCPSGN
},
},
},
+ {
+ name: "FROUND",
+ argLen: 1,
+ asm: ppc64.AFRIN,
+ reg: regInfo{
+ inputs: []inputInfo{
+ {0, 576460743713488896}, // F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26
+ },
+ outputs: []outputInfo{
+ {0, 576460743713488896}, // F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26
+ },
+ },
+ },
{
name: "FABS",
argLen: 1,
return rewriteValuePPC64_OpPopCount64_0(v)
case OpPopCount8:
return rewriteValuePPC64_OpPopCount8_0(v)
+ case OpRound:
+ return rewriteValuePPC64_OpRound_0(v)
case OpRound32F:
return rewriteValuePPC64_OpRound32F_0(v)
case OpRound64F:
return true
}
}
+func rewriteValuePPC64_OpRound_0(v *Value) bool {
+ // match: (Round x)
+ // cond:
+ // result: (FROUND x)
+ x := v.Args[0]
+ v.reset(OpPPC64FROUND)
+ v.AddArg(x)
+ return true
+}
func rewriteValuePPC64_OpRound32F_0(v *Value) bool {
// match: (Round32F x)
// cond:
AFRIPCC
AFRIZ
AFRIZCC
+ AFRIN
+ AFRINCC
AFRSQRTE
AFRSQRTECC
AFSEL
"FRIPCC",
"FRIZ",
"FRIZCC",
+ "FRIN",
+ "FRINCC",
"FRSQRTE",
"FRSQRTECC",
"FSEL",
opset(AFRIPCC, r0)
opset(AFRIZ, r0)
opset(AFRIZCC, r0)
+ opset(AFRIN, r0)
+ opset(AFRINCC, r0)
opset(AFRSQRTE, r0)
opset(AFRSQRTECC, r0)
opset(AFSQRT, r0)
return OPVCC(63, 424, 0, 0)
case AFRIZCC:
return OPVCC(63, 424, 0, 1)
+ case AFRIN:
+ return OPVCC(63, 392, 0, 0)
+ case AFRINCC:
+ return OPVCC(63, 392, 0, 1)
case AFRSP:
return OPVCC(63, 12, 0, 0)
case AFRSPCC:
func approx(x float64) {
// s390x:"FIDBR\t[$]6"
// arm64:"FRINTPD"
+ // ppc64le:"FRIP"
sink64[0] = math.Ceil(x)
// s390x:"FIDBR\t[$]7"
// arm64:"FRINTMD"
+ // ppc64le:"FRIM"
sink64[1] = math.Floor(x)
// s390x:"FIDBR\t[$]1"
// arm64:"FRINTAD"
+ // ppc64le:"FRIN"
sink64[2] = math.Round(x)
// s390x:"FIDBR\t[$]5"
// arm64:"FRINTZD"
+ // ppc64le:"FRIZ"
sink64[3] = math.Trunc(x)
// s390x:"FIDBR\t[$]4"