internal/cpu: fix cpu cacheLineSize for loong64

We choose 64 because the L1 Dcache of Loongson 3A5000 CPU is
4-way 256-line 64-byte-per-line.

Change-Id: Ifb9a9f993dd6f75b5adb4ff6e4d93e945b1b2a98
Reviewed-on: https://go-review.googlesource.com/c/go/+/408854
Run-TryBot: Ian Lance Taylor <iant@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
Auto-Submit: Ian Lance Taylor <iant@google.com>
Reviewed-by: Alex Rakoczy <alex@golang.org>
Reviewed-by: Ian Lance Taylor <iant@google.com>

diff --git a/src/internal/cpu/cpu_loong64.go b/src/internal/cpu/cpu_loong64.go
index d8403d731ace7aa1a576d1df7a6016c9576f4e6d..1c90c24fe318d9e1b902038500468751773930c5 100644 (file)
--- a/src/internal/cpu/cpu_loong64.go
+++ b/src/internal/cpu/cpu_loong64.go
@@ -6,6 +6,8 @@
 
 package cpu
 
-const CacheLinePadSize = 32
+// CacheLinePadSize is used to prevent false sharing of cache lines.
+// We choose 64 because Loongson 3A5000 the L1 Dcache is 4-way 256-line 64-byte-per-line.
+const CacheLinePadSize = 64
 
 func doinit() {}