return rewriteValuePPC64_OpPPC64ADDconst(v)
case OpPPC64AND:
return rewriteValuePPC64_OpPPC64AND(v)
+ case OpPPC64ANDCCconst:
+ return rewriteValuePPC64_OpPPC64ANDCCconst(v)
case OpPPC64ANDN:
return rewriteValuePPC64_OpPPC64ANDN(v)
case OpPPC64CLRLSLDI:
typ := &b.Func.Config.Types
// match: (Lsh16x16 x y)
// cond: shiftIsBounded(v)
- // result: (SLW x y)
+ // result: (SLD x y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SLW)
+ v.reset(OpPPC64SLD)
v.AddArg2(x, y)
return true
}
- // match: (Lsh16x16 x y)
- // result: (SLW x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt16to64 y) (MOVDconst [16]))))
+ // match: (Lsh16x16 <t> x y)
+ // result: (ISEL [2] (SLD <t> (MOVHZreg x) y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0xFFF0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
- v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(16)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v4 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v4.AuxInt = int64ToAuxInt(0xFFF0)
+ v4.AddArg(y)
+ v3.AddArg(v4)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Lsh16x32 x y)
// cond: shiftIsBounded(v)
- // result: (SLW x y)
+ // result: (SLD x y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SLW)
+ v.reset(OpPPC64SLD)
v.AddArg2(x, y)
return true
}
- // match: (Lsh16x32 x y)
- // result: (SLW x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [16]))))
+ // match: (Lsh16x32 <t> x y)
+ // result: (ISEL [0] (SLD <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPWUconst y [16]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(16)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
+ v3.AuxInt = int32ToAuxInt(16)
+ v3.AddArg(y)
+ v.AddArg3(v0, v2, v3)
return true
}
}
}
// match: (Lsh16x64 x y)
// cond: shiftIsBounded(v)
- // result: (SLW x y)
+ // result: (SLD x y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SLW)
+ v.reset(OpPPC64SLD)
v.AddArg2(x, y)
return true
}
- // match: (Lsh16x64 x y)
- // result: (SLW x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [16]))))
+ // match: (Lsh16x64 <t> x y)
+ // result: (ISEL [0] (SLD <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPUconst y [16]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
v3.AuxInt = int64ToAuxInt(16)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v3.AddArg(y)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Lsh16x8 x y)
// cond: shiftIsBounded(v)
- // result: (SLW x y)
+ // result: (SLD x y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SLW)
+ v.reset(OpPPC64SLD)
v.AddArg2(x, y)
return true
}
- // match: (Lsh16x8 x y)
- // result: (SLW x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt8to64 y) (MOVDconst [16]))))
+ // match: (Lsh16x8 <t> x y)
+ // result: (ISEL [2] (SLD <t> (MOVHZreg x) y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0x00F0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
- v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(16)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v4 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v4.AuxInt = int64ToAuxInt(0x00F0)
+ v4.AddArg(y)
+ v3.AddArg(v4)
+ v.AddArg3(v0, v2, v3)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Lsh32x16 x y)
- // result: (SLW x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt16to64 y) (MOVDconst [32]))))
+ // match: (Lsh32x16 <t> x y)
+ // result: (ISEL [2] (SLW <t> x y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0xFFE0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLW, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v3 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v3.AuxInt = int64ToAuxInt(0xFFE0)
v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(32)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v2.AddArg(v3)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Lsh32x32 x y)
- // result: (SLW x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [32]))))
+ // match: (Lsh32x32 <t> x y)
+ // result: (ISEL [0] (SLW <t> x y) (MOVDconst [0]) (CMPWUconst y [32]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLW, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(32)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
+ v2.AuxInt = int32ToAuxInt(32)
+ v2.AddArg(y)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Lsh32x64 x y)
- // result: (SLW x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [32]))))
+ // match: (Lsh32x64 <t> x y)
+ // result: (ISEL [0] (SLW <t> x y) (MOVDconst [0]) (CMPUconst y [32]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLW, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(32)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
+ v2.AuxInt = int64ToAuxInt(32)
+ v2.AddArg(y)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Lsh32x8 x y)
- // result: (SLW x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt8to64 y) (MOVDconst [32]))))
+ // match: (Lsh32x8 <t> x y)
+ // result: (ISEL [2] (SLW <t> x y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0x00E0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLW, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v3 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v3.AuxInt = int64ToAuxInt(0x00E0)
v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(32)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v2.AddArg(v3)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Lsh64x16 x y)
- // result: (SLD x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt16to64 y) (MOVDconst [64]))))
+ // match: (Lsh64x16 <t> x y)
+ // result: (ISEL [2] (SLD <t> x y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0xFFC0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLD)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v3 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v3.AuxInt = int64ToAuxInt(0xFFC0)
v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(64)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v2.AddArg(v3)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Lsh64x32 x y)
- // result: (SLD x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [64]))))
+ // match: (Lsh64x32 <t> x y)
+ // result: (ISEL [0] (SLD <t> x y) (MOVDconst [0]) (CMPWUconst y [64]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLD)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(64)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
+ v2.AuxInt = int32ToAuxInt(64)
+ v2.AddArg(y)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Lsh64x64 x y)
- // result: (SLD x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [64]))))
+ // match: (Lsh64x64 <t> x y)
+ // result: (ISEL [0] (SLD <t> x y) (MOVDconst [0]) (CMPUconst y [64]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLD)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(64)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
+ v2.AuxInt = int64ToAuxInt(64)
+ v2.AddArg(y)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Lsh64x8 x y)
- // result: (SLD x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt8to64 y) (MOVDconst [64]))))
+ // match: (Lsh64x8 <t> x y)
+ // result: (ISEL [2] (SLD <t> x y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0x00C0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLD)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v3 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v3.AuxInt = int64ToAuxInt(0x00C0)
v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(64)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v2.AddArg(v3)
+ v.AddArg3(v0, v1, v2)
return true
}
}
typ := &b.Func.Config.Types
// match: (Lsh8x16 x y)
// cond: shiftIsBounded(v)
- // result: (SLW x y)
+ // result: (SLD x y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SLW)
+ v.reset(OpPPC64SLD)
v.AddArg2(x, y)
return true
}
- // match: (Lsh8x16 x y)
- // result: (SLW x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt16to64 y) (MOVDconst [8]))))
+ // match: (Lsh8x16 <t> x y)
+ // result: (ISEL [2] (SLD <t> (MOVBZreg x) y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0xFFF8] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
- v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(8)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v4 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v4.AuxInt = int64ToAuxInt(0xFFF8)
+ v4.AddArg(y)
+ v3.AddArg(v4)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Lsh8x32 x y)
// cond: shiftIsBounded(v)
- // result: (SLW x y)
+ // result: (SLD x y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SLW)
+ v.reset(OpPPC64SLD)
v.AddArg2(x, y)
return true
}
- // match: (Lsh8x32 x y)
- // result: (SLW x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [8]))))
+ // match: (Lsh8x32 <t> x y)
+ // result: (ISEL [0] (SLD <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPWUconst y [8]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(8)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
+ v3.AuxInt = int32ToAuxInt(8)
+ v3.AddArg(y)
+ v.AddArg3(v0, v2, v3)
return true
}
}
}
// match: (Lsh8x64 x y)
// cond: shiftIsBounded(v)
- // result: (SLW x y)
+ // result: (SLD x y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SLW)
+ v.reset(OpPPC64SLD)
v.AddArg2(x, y)
return true
}
- // match: (Lsh8x64 x y)
- // result: (SLW x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [8]))))
+ // match: (Lsh8x64 <t> x y)
+ // result: (ISEL [0] (SLD <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPUconst y [8]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
v3.AuxInt = int64ToAuxInt(8)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v3.AddArg(y)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Lsh8x8 x y)
// cond: shiftIsBounded(v)
- // result: (SLW x y)
+ // result: (SLD x y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SLW)
+ v.reset(OpPPC64SLD)
v.AddArg2(x, y)
return true
}
- // match: (Lsh8x8 x y)
- // result: (SLW x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt8to64 y) (MOVDconst [8]))))
+ // match: (Lsh8x8 <t> x y)
+ // result: (ISEL [2] (SLD <t> (MOVBZreg x) y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0x00F8] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SLW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
- v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(8)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SLD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v4 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v4.AuxInt = int64ToAuxInt(0x00F8)
+ v4.AddArg(y)
+ v3.AddArg(v4)
+ v.AddArg3(v0, v2, v3)
return true
}
}
}
return false
}
+func rewriteValuePPC64_OpPPC64ANDCCconst(v *Value) bool {
+ v_0 := v.Args[0]
+ // match: (ANDCCconst [c] (Select0 (ANDCCconst [d] x)))
+ // result: (ANDCCconst [c&d] x)
+ for {
+ c := auxIntToInt64(v.AuxInt)
+ if v_0.Op != OpSelect0 {
+ break
+ }
+ v_0_0 := v_0.Args[0]
+ if v_0_0.Op != OpPPC64ANDCCconst {
+ break
+ }
+ d := auxIntToInt64(v_0_0.AuxInt)
+ x := v_0_0.Args[0]
+ v.reset(OpPPC64ANDCCconst)
+ v.AuxInt = int64ToAuxInt(c & d)
+ v.AddArg(x)
+ return true
+ }
+ return false
+}
func rewriteValuePPC64_OpPPC64ANDN(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
}
func rewriteValuePPC64_OpPPC64CMPUconst(v *Value) bool {
v_0 := v.Args[0]
- // match: (CMPUconst (MOVDconst [x]) [y])
- // cond: x==y
- // result: (FlagEQ)
+ // match: (CMPUconst [d] (Select0 (ANDCCconst z [c])))
+ // cond: uint64(d) > uint64(c)
+ // result: (FlagLT)
for {
- y := auxIntToInt64(v.AuxInt)
+ d := auxIntToInt64(v.AuxInt)
+ if v_0.Op != OpSelect0 {
+ break
+ }
+ v_0_0 := v_0.Args[0]
+ if v_0_0.Op != OpPPC64ANDCCconst {
+ break
+ }
+ c := auxIntToInt64(v_0_0.AuxInt)
+ if !(uint64(d) > uint64(c)) {
+ break
+ }
+ v.reset(OpPPC64FlagLT)
+ return true
+ }
+ // match: (CMPUconst (MOVDconst [x]) [y])
+ // cond: x==y
+ // result: (FlagEQ)
+ for {
+ y := auxIntToInt64(v.AuxInt)
if v_0.Op != OpPPC64MOVDconst {
break
}
}
func rewriteValuePPC64_OpPPC64CMPWUconst(v *Value) bool {
v_0 := v.Args[0]
+ // match: (CMPWUconst [d] (Select0 (ANDCCconst z [c])))
+ // cond: uint64(d) > uint64(c)
+ // result: (FlagLT)
+ for {
+ d := auxIntToInt32(v.AuxInt)
+ if v_0.Op != OpSelect0 {
+ break
+ }
+ v_0_0 := v_0.Args[0]
+ if v_0_0.Op != OpPPC64ANDCCconst {
+ break
+ }
+ c := auxIntToInt64(v_0_0.AuxInt)
+ if !(uint64(d) > uint64(c)) {
+ break
+ }
+ v.reset(OpPPC64FlagLT)
+ return true
+ }
// match: (CMPWUconst (MOVDconst [x]) [y])
// cond: int32(x)==int32(y)
// result: (FlagEQ)
v_0 := v.Args[0]
b := v.Block
typ := &b.Func.Config.Types
- // match: (ISEL [0] (Select0 (ANDCCconst [d] y)) (MOVDconst [-1]) (CMPU (Select0 (ANDCCconst [d] y)) (MOVDconst [c])))
- // cond: c >= d
- // result: (Select0 (ANDCCconst [d] y))
- for {
- if auxIntToInt32(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
- break
- }
- v_0_0 := v_0.Args[0]
- if v_0_0.Op != OpPPC64ANDCCconst {
- break
- }
- d := auxIntToInt64(v_0_0.AuxInt)
- y := v_0_0.Args[0]
- if v_1.Op != OpPPC64MOVDconst || auxIntToInt64(v_1.AuxInt) != -1 || v_2.Op != OpPPC64CMPU {
- break
- }
- _ = v_2.Args[1]
- v_2_0 := v_2.Args[0]
- if v_2_0.Op != OpSelect0 {
- break
- }
- v_2_0_0 := v_2_0.Args[0]
- if v_2_0_0.Op != OpPPC64ANDCCconst || auxIntToInt64(v_2_0_0.AuxInt) != d || y != v_2_0_0.Args[0] {
- break
- }
- v_2_1 := v_2.Args[1]
- if v_2_1.Op != OpPPC64MOVDconst {
- break
- }
- c := auxIntToInt64(v_2_1.AuxInt)
- if !(c >= d) {
- break
- }
- v.reset(OpSelect0)
- v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
- v0.AuxInt = int64ToAuxInt(d)
- v0.AddArg(y)
- v.AddArg(v0)
- return true
- }
- // match: (ISEL [0] (Select0 (ANDCCconst [d] y)) (MOVDconst [-1]) (CMPUconst [c] (Select0 (ANDCCconst [d] y))))
- // cond: c >= d
- // result: (Select0 (ANDCCconst [d] y))
- for {
- if auxIntToInt32(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
- break
- }
- v_0_0 := v_0.Args[0]
- if v_0_0.Op != OpPPC64ANDCCconst {
- break
- }
- d := auxIntToInt64(v_0_0.AuxInt)
- y := v_0_0.Args[0]
- if v_1.Op != OpPPC64MOVDconst || auxIntToInt64(v_1.AuxInt) != -1 || v_2.Op != OpPPC64CMPUconst {
- break
- }
- c := auxIntToInt64(v_2.AuxInt)
- v_2_0 := v_2.Args[0]
- if v_2_0.Op != OpSelect0 {
- break
- }
- v_2_0_0 := v_2_0.Args[0]
- if v_2_0_0.Op != OpPPC64ANDCCconst || auxIntToInt64(v_2_0_0.AuxInt) != d || y != v_2_0_0.Args[0] || !(c >= d) {
- break
- }
- v.reset(OpSelect0)
- v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
- v0.AuxInt = int64ToAuxInt(d)
- v0.AddArg(y)
- v.AddArg(v0)
- return true
- }
// match: (ISEL [6] x y (Select1 (ANDCCconst [1] (SETBC [c] cmp))))
// result: (ISEL [c] x y cmp)
for {
typ := &b.Func.Config.Types
// match: (Rsh16Ux16 x y)
// cond: shiftIsBounded(v)
- // result: (SRW (MOVHZreg x) y)
+ // result: (SRD (MOVHZreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRW)
+ v.reset(OpPPC64SRD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh16Ux16 x y)
- // result: (SRW (ZeroExt16to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt16to64 y) (MOVDconst [16]))))
+ // match: (Rsh16Ux16 <t> x y)
+ // result: (ISEL [2] (SRD <t> (MOVHZreg x) y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0xFFF0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRW)
- v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v4 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v4.AuxInt = int64ToAuxInt(0xFFF0)
v4.AddArg(y)
- v5 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v5.AuxInt = int64ToAuxInt(16)
- v3.AddArg2(v4, v5)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v3.AddArg(v4)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Rsh16Ux32 x y)
// cond: shiftIsBounded(v)
- // result: (SRW (MOVHZreg x) y)
+ // result: (SRD (MOVHZreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRW)
+ v.reset(OpPPC64SRD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh16Ux32 x y)
- // result: (SRW (ZeroExt16to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [16]))))
+ // match: (Rsh16Ux32 <t> x y)
+ // result: (ISEL [0] (SRD <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPWUconst y [16]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRW)
- v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(16)
- v3.AddArg2(y, v4)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
+ v3.AuxInt = int32ToAuxInt(16)
+ v3.AddArg(y)
+ v.AddArg3(v0, v2, v3)
return true
}
}
}
// match: (Rsh16Ux64 x y)
// cond: shiftIsBounded(v)
- // result: (SRW (MOVHZreg x) y)
+ // result: (SRD (MOVHZreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRW)
+ v.reset(OpPPC64SRD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh16Ux64 x y)
- // result: (SRW (ZeroExt16to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [16]))))
+ // match: (Rsh16Ux64 <t> x y)
+ // result: (ISEL [0] (SRD <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPUconst y [16]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRW)
- v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(16)
- v3.AddArg2(y, v4)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
+ v3.AuxInt = int64ToAuxInt(16)
+ v3.AddArg(y)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Rsh16Ux8 x y)
// cond: shiftIsBounded(v)
- // result: (SRW (MOVHZreg x) y)
+ // result: (SRD (MOVHZreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRW)
+ v.reset(OpPPC64SRD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh16Ux8 x y)
- // result: (SRW (ZeroExt16to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt8to64 y) (MOVDconst [16]))))
+ // match: (Rsh16Ux8 <t> x y)
+ // result: (ISEL [2] (SRD <t> (MOVHZreg x) y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0x00F0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRW)
- v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVHZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v4 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v4.AuxInt = int64ToAuxInt(0x00F0)
v4.AddArg(y)
- v5 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v5.AuxInt = int64ToAuxInt(16)
- v3.AddArg2(v4, v5)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v3.AddArg(v4)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Rsh16x16 x y)
// cond: shiftIsBounded(v)
- // result: (SRAW (MOVHreg x) y)
+ // result: (SRAD (MOVHreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRAW)
+ v.reset(OpPPC64SRAD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh16x16 x y)
- // result: (SRAW (SignExt16to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt16to64 y) (MOVDconst [16]))))
+ // match: (Rsh16x16 <t> x y)
+ // result: (ISEL [2] (SRAD <t> (MOVHreg x) y) (SRADconst <t> (MOVHreg x) [15]) (Select1 <types.TypeFlags> (ANDCCconst [0xFFF0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAW)
- v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
- v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
+ v2.AuxInt = int64ToAuxInt(15)
+ v2.AddArg(v1)
+ v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v4 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v4.AuxInt = int64ToAuxInt(0xFFF0)
v4.AddArg(y)
- v5 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v5.AuxInt = int64ToAuxInt(16)
- v3.AddArg2(v4, v5)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v3.AddArg(v4)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Rsh16x32 x y)
// cond: shiftIsBounded(v)
- // result: (SRAW (MOVHreg x) y)
+ // result: (SRAD (MOVHreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRAW)
+ v.reset(OpPPC64SRAD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh16x32 x y)
- // result: (SRAW (SignExt16to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [16]))))
+ // match: (Rsh16x32 <t> x y)
+ // result: (ISEL [0] (SRAD <t> (MOVHreg x) y) (SRADconst <t> (MOVHreg x) [15]) (CMPWUconst y [16]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAW)
- v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
- v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(16)
- v3.AddArg2(y, v4)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
+ v2.AuxInt = int64ToAuxInt(15)
+ v2.AddArg(v1)
+ v3 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
+ v3.AuxInt = int32ToAuxInt(16)
+ v3.AddArg(y)
+ v.AddArg3(v0, v2, v3)
return true
}
}
}
// match: (Rsh16x64 x y)
// cond: shiftIsBounded(v)
- // result: (SRAW (MOVHreg x) y)
+ // result: (SRAD (MOVHreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRAW)
+ v.reset(OpPPC64SRAD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh16x64 x y)
- // result: (SRAW (SignExt16to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [16]))))
+ // match: (Rsh16x64 <t> x y)
+ // result: (ISEL [0] (SRAD <t> (MOVHreg x) y) (SRADconst <t> (MOVHreg x) [15]) (CMPUconst y [16]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAW)
- v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
- v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(16)
- v3.AddArg2(y, v4)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
+ v2.AuxInt = int64ToAuxInt(15)
+ v2.AddArg(v1)
+ v3 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
+ v3.AuxInt = int64ToAuxInt(16)
+ v3.AddArg(y)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Rsh16x8 x y)
// cond: shiftIsBounded(v)
- // result: (SRAW (MOVHreg x) y)
+ // result: (SRAD (MOVHreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRAW)
+ v.reset(OpPPC64SRAD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh16x8 x y)
- // result: (SRAW (SignExt16to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt8to64 y) (MOVDconst [16]))))
+ // match: (Rsh16x8 <t> x y)
+ // result: (ISEL [2] (SRAD <t> (MOVHreg x) y) (SRADconst <t> (MOVHreg x) [15]) (Select1 <types.TypeFlags> (ANDCCconst [0x00F0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAW)
- v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
- v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVHreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
+ v2.AuxInt = int64ToAuxInt(15)
+ v2.AddArg(v1)
+ v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v4 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v4.AuxInt = int64ToAuxInt(0x00F0)
v4.AddArg(y)
- v5 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v5.AuxInt = int64ToAuxInt(16)
- v3.AddArg2(v4, v5)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v3.AddArg(v4)
+ v.AddArg3(v0, v2, v3)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Rsh32Ux16 x y)
- // result: (SRW x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt16to64 y) (MOVDconst [32]))))
+ // match: (Rsh32Ux16 <t> x y)
+ // result: (ISEL [2] (SRW <t> x y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0xFFE0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRW, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v3 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v3.AuxInt = int64ToAuxInt(0xFFE0)
v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(32)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v2.AddArg(v3)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Rsh32Ux32 x y)
- // result: (SRW x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [32]))))
+ // match: (Rsh32Ux32 <t> x y)
+ // result: (ISEL [0] (SRW <t> x y) (MOVDconst [0]) (CMPWUconst y [32]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRW, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(32)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
+ v2.AuxInt = int32ToAuxInt(32)
+ v2.AddArg(y)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Rsh32Ux64 x y)
- // result: (SRW x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [32]))))
+ // match: (Rsh32Ux64 <t> x y)
+ // result: (ISEL [0] (SRW <t> x y) (MOVDconst [0]) (CMPUconst y [32]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRW, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(32)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
+ v2.AuxInt = int64ToAuxInt(32)
+ v2.AddArg(y)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Rsh32Ux8 x y)
- // result: (SRW x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt8to64 y) (MOVDconst [32]))))
+ // match: (Rsh32Ux8 <t> x y)
+ // result: (ISEL [2] (SRW <t> x y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0x00E0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRW, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v3 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v3.AuxInt = int64ToAuxInt(0x00E0)
v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(32)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v2.AddArg(v3)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Rsh32x16 x y)
- // result: (SRAW x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt16to64 y) (MOVDconst [32]))))
+ // match: (Rsh32x16 <t> x y)
+ // result: (ISEL [2] (SRAW <t> x y) (SRAWconst <t> x [31]) (Select1 <types.TypeFlags> (ANDCCconst [0xFFE0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAW, t)
+ v0.AddArg2(x, y)
+ v1 := b.NewValue0(v.Pos, OpPPC64SRAWconst, t)
+ v1.AuxInt = int64ToAuxInt(31)
+ v1.AddArg(x)
+ v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v3 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v3.AuxInt = int64ToAuxInt(0xFFE0)
v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(32)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v2.AddArg(v3)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v_1 := v.Args[1]
v_0 := v.Args[0]
b := v.Block
- typ := &b.Func.Config.Types
// match: (Rsh32x32 x y)
// cond: shiftIsBounded(v)
// result: (SRAW x y)
v.AddArg2(x, y)
return true
}
- // match: (Rsh32x32 x y)
- // result: (SRAW x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [32]))))
+ // match: (Rsh32x32 <t> x y)
+ // result: (ISEL [0] (SRAW <t> x y) (SRAWconst <t> x [31]) (CMPWUconst y [32]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(32)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAW, t)
+ v0.AddArg2(x, y)
+ v1 := b.NewValue0(v.Pos, OpPPC64SRAWconst, t)
+ v1.AuxInt = int64ToAuxInt(31)
+ v1.AddArg(x)
+ v2 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
+ v2.AuxInt = int32ToAuxInt(32)
+ v2.AddArg(y)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v_1 := v.Args[1]
v_0 := v.Args[0]
b := v.Block
- typ := &b.Func.Config.Types
// match: (Rsh32x64 x (MOVDconst [c]))
// cond: uint64(c) >= 32
// result: (SRAWconst x [63])
v.AddArg2(x, y)
return true
}
- // match: (Rsh32x64 x y)
- // result: (SRAW x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [32]))))
+ // match: (Rsh32x64 <t> x y)
+ // result: (ISEL [0] (SRAW <t> x y) (SRAWconst <t> x [31]) (CMPUconst y [32]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(32)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAW, t)
+ v0.AddArg2(x, y)
+ v1 := b.NewValue0(v.Pos, OpPPC64SRAWconst, t)
+ v1.AuxInt = int64ToAuxInt(31)
+ v1.AddArg(x)
+ v2 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
+ v2.AuxInt = int64ToAuxInt(32)
+ v2.AddArg(y)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Rsh32x8 x y)
- // result: (SRAW x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt8to64 y) (MOVDconst [32]))))
+ // match: (Rsh32x8 <t> x y)
+ // result: (ISEL [2] (SRAW <t> x y) (SRAWconst <t> x [31]) (Select1 <types.TypeFlags> (ANDCCconst [0x00E0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAW)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAW, t)
+ v0.AddArg2(x, y)
+ v1 := b.NewValue0(v.Pos, OpPPC64SRAWconst, t)
+ v1.AuxInt = int64ToAuxInt(31)
+ v1.AddArg(x)
+ v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v3 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v3.AuxInt = int64ToAuxInt(0x00E0)
v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(32)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v2.AddArg(v3)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Rsh64Ux16 x y)
- // result: (SRD x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt16to64 y) (MOVDconst [64]))))
+ // match: (Rsh64Ux16 <t> x y)
+ // result: (ISEL [2] (SRD <t> x y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0xFFC0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRD)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v3 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v3.AuxInt = int64ToAuxInt(0xFFC0)
v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(64)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v2.AddArg(v3)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Rsh64Ux32 x y)
- // result: (SRD x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [64]))))
+ // match: (Rsh64Ux32 <t> x y)
+ // result: (ISEL [0] (SRD <t> x y) (MOVDconst [0]) (CMPWUconst y [64]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRD)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(64)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
+ v2.AuxInt = int32ToAuxInt(64)
+ v2.AddArg(y)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Rsh64Ux64 x y)
- // result: (SRD x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [64]))))
+ // match: (Rsh64Ux64 <t> x y)
+ // result: (ISEL [0] (SRD <t> x y) (MOVDconst [0]) (CMPUconst y [64]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRD)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(64)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
+ v2.AuxInt = int64ToAuxInt(64)
+ v2.AddArg(y)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Rsh64Ux8 x y)
- // result: (SRD x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt8to64 y) (MOVDconst [64]))))
+ // match: (Rsh64Ux8 <t> x y)
+ // result: (ISEL [2] (SRD <t> x y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0x00C0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRD)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
+ v0.AddArg2(x, y)
v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
+ v1.AuxInt = int64ToAuxInt(0)
+ v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v3 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v3.AuxInt = int64ToAuxInt(0x00C0)
v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(64)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v2.AddArg(v3)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Rsh64x16 x y)
- // result: (SRAD x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt16to64 y) (MOVDconst [64]))))
+ // match: (Rsh64x16 <t> x y)
+ // result: (ISEL [2] (SRAD <t> x y) (SRADconst <t> x [63]) (Select1 <types.TypeFlags> (ANDCCconst [0xFFC0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAD)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
+ v0.AddArg2(x, y)
+ v1 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
+ v1.AuxInt = int64ToAuxInt(63)
+ v1.AddArg(x)
+ v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v3 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v3.AuxInt = int64ToAuxInt(0xFFC0)
v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(64)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v2.AddArg(v3)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v_1 := v.Args[1]
v_0 := v.Args[0]
b := v.Block
- typ := &b.Func.Config.Types
// match: (Rsh64x32 x y)
// cond: shiftIsBounded(v)
// result: (SRAD x y)
v.AddArg2(x, y)
return true
}
- // match: (Rsh64x32 x y)
- // result: (SRAD x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [64]))))
+ // match: (Rsh64x32 <t> x y)
+ // result: (ISEL [0] (SRAD <t> x y) (SRADconst <t> x [63]) (CMPWUconst y [64]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAD)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(64)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
+ v0.AddArg2(x, y)
+ v1 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
+ v1.AuxInt = int64ToAuxInt(63)
+ v1.AddArg(x)
+ v2 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
+ v2.AuxInt = int32ToAuxInt(64)
+ v2.AddArg(y)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v_1 := v.Args[1]
v_0 := v.Args[0]
b := v.Block
- typ := &b.Func.Config.Types
// match: (Rsh64x64 x (MOVDconst [c]))
// cond: uint64(c) >= 64
// result: (SRADconst x [63])
v.AddArg2(x, y)
return true
}
- // match: (Rsh64x64 x y)
- // result: (SRAD x (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [64]))))
+ // match: (Rsh64x64 <t> x y)
+ // result: (ISEL [0] (SRAD <t> x y) (SRADconst <t> x [63]) (CMPUconst y [64]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAD)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v3.AuxInt = int64ToAuxInt(64)
- v2.AddArg2(y, v3)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
+ v0.AddArg2(x, y)
+ v1 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
+ v1.AuxInt = int64ToAuxInt(63)
+ v1.AddArg(x)
+ v2 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
+ v2.AuxInt = int64ToAuxInt(64)
+ v2.AddArg(y)
+ v.AddArg3(v0, v1, v2)
return true
}
}
v.AddArg2(x, y)
return true
}
- // match: (Rsh64x8 x y)
- // result: (SRAD x (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt8to64 y) (MOVDconst [64]))))
+ // match: (Rsh64x8 <t> x y)
+ // result: (ISEL [2] (SRAD <t> x y) (SRADconst <t> x [63]) (Select1 <types.TypeFlags> (ANDCCconst [0x00C0] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAD)
- v0 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v0.AuxInt = int32ToAuxInt(0)
- v1 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v1.AuxInt = int64ToAuxInt(-1)
- v2 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v3 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
+ v0.AddArg2(x, y)
+ v1 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
+ v1.AuxInt = int64ToAuxInt(63)
+ v1.AddArg(x)
+ v2 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v3 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v3.AuxInt = int64ToAuxInt(0x00C0)
v3.AddArg(y)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(64)
- v2.AddArg2(v3, v4)
- v0.AddArg3(y, v1, v2)
- v.AddArg2(x, v0)
+ v2.AddArg(v3)
+ v.AddArg3(v0, v1, v2)
return true
}
}
typ := &b.Func.Config.Types
// match: (Rsh8Ux16 x y)
// cond: shiftIsBounded(v)
- // result: (SRW (MOVBZreg x) y)
+ // result: (SRD (MOVBZreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRW)
+ v.reset(OpPPC64SRD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh8Ux16 x y)
- // result: (SRW (ZeroExt8to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt16to64 y) (MOVDconst [8]))))
+ // match: (Rsh8Ux16 <t> x y)
+ // result: (ISEL [2] (SRD <t> (MOVBZreg x) y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0xFFF8] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRW)
- v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v4 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v4.AuxInt = int64ToAuxInt(0xFFF8)
v4.AddArg(y)
- v5 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v5.AuxInt = int64ToAuxInt(8)
- v3.AddArg2(v4, v5)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v3.AddArg(v4)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Rsh8Ux32 x y)
// cond: shiftIsBounded(v)
- // result: (SRW (MOVBZreg x) y)
+ // result: (SRD (MOVBZreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRW)
+ v.reset(OpPPC64SRD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh8Ux32 x y)
- // result: (SRW (ZeroExt8to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [8]))))
+ // match: (Rsh8Ux32 <t> x y)
+ // result: (ISEL [0] (SRD <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPWUconst y [8]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRW)
- v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(8)
- v3.AddArg2(y, v4)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
+ v3.AuxInt = int32ToAuxInt(8)
+ v3.AddArg(y)
+ v.AddArg3(v0, v2, v3)
return true
}
}
}
// match: (Rsh8Ux64 x y)
// cond: shiftIsBounded(v)
- // result: (SRW (MOVBZreg x) y)
+ // result: (SRD (MOVBZreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRW)
+ v.reset(OpPPC64SRD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh8Ux64 x y)
- // result: (SRW (ZeroExt8to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [8]))))
+ // match: (Rsh8Ux64 <t> x y)
+ // result: (ISEL [0] (SRD <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPUconst y [8]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRW)
- v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(8)
- v3.AddArg2(y, v4)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
+ v3.AuxInt = int64ToAuxInt(8)
+ v3.AddArg(y)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Rsh8Ux8 x y)
// cond: shiftIsBounded(v)
- // result: (SRW (MOVBZreg x) y)
+ // result: (SRD (MOVBZreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRW)
+ v.reset(OpPPC64SRD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh8Ux8 x y)
- // result: (SRW (ZeroExt8to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt8to64 y) (MOVDconst [8]))))
+ // match: (Rsh8Ux8 <t> x y)
+ // result: (ISEL [2] (SRD <t> (MOVBZreg x) y) (MOVDconst [0]) (Select1 <types.TypeFlags> (ANDCCconst [0x00F8] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRW)
- v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVBZreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
+ v2.AuxInt = int64ToAuxInt(0)
+ v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v4 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v4.AuxInt = int64ToAuxInt(0x00F8)
v4.AddArg(y)
- v5 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v5.AuxInt = int64ToAuxInt(8)
- v3.AddArg2(v4, v5)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v3.AddArg(v4)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Rsh8x16 x y)
// cond: shiftIsBounded(v)
- // result: (SRAW (MOVBreg x) y)
+ // result: (SRAD (MOVBreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRAW)
+ v.reset(OpPPC64SRAD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh8x16 x y)
- // result: (SRAW (SignExt8to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt16to64 y) (MOVDconst [8]))))
+ // match: (Rsh8x16 <t> x y)
+ // result: (ISEL [2] (SRAD <t> (MOVBreg x) y) (SRADconst <t> (MOVBreg x) [7]) (Select1 <types.TypeFlags> (ANDCCconst [0xFFF8] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAW)
- v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
- v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
+ v2.AuxInt = int64ToAuxInt(7)
+ v2.AddArg(v1)
+ v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v4 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v4.AuxInt = int64ToAuxInt(0xFFF8)
v4.AddArg(y)
- v5 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v5.AuxInt = int64ToAuxInt(8)
- v3.AddArg2(v4, v5)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v3.AddArg(v4)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Rsh8x32 x y)
// cond: shiftIsBounded(v)
- // result: (SRAW (MOVBreg x) y)
+ // result: (SRAD (MOVBreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRAW)
+ v.reset(OpPPC64SRAD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh8x32 x y)
- // result: (SRAW (SignExt8to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [8]))))
+ // match: (Rsh8x32 <t> x y)
+ // result: (ISEL [0] (SRAD <t> (MOVBreg x) y) (SRADconst <t> (MOVBreg x) [7]) (CMPWUconst y [8]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAW)
- v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
- v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(8)
- v3.AddArg2(y, v4)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
+ v2.AuxInt = int64ToAuxInt(7)
+ v2.AddArg(v1)
+ v3 := b.NewValue0(v.Pos, OpPPC64CMPWUconst, types.TypeFlags)
+ v3.AuxInt = int32ToAuxInt(8)
+ v3.AddArg(y)
+ v.AddArg3(v0, v2, v3)
return true
}
}
}
// match: (Rsh8x64 x y)
// cond: shiftIsBounded(v)
- // result: (SRAW (MOVBreg x) y)
+ // result: (SRAD (MOVBreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRAW)
+ v.reset(OpPPC64SRAD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh8x64 x y)
- // result: (SRAW (SignExt8to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU y (MOVDconst [8]))))
+ // match: (Rsh8x64 <t> x y)
+ // result: (ISEL [0] (SRAD <t> (MOVBreg x) y) (SRADconst <t> (MOVBreg x) [7]) (CMPUconst y [8]))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAW)
- v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
- v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v4.AuxInt = int64ToAuxInt(8)
- v3.AddArg2(y, v4)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(0)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
+ v2.AuxInt = int64ToAuxInt(7)
+ v2.AddArg(v1)
+ v3 := b.NewValue0(v.Pos, OpPPC64CMPUconst, types.TypeFlags)
+ v3.AuxInt = int64ToAuxInt(8)
+ v3.AddArg(y)
+ v.AddArg3(v0, v2, v3)
return true
}
}
typ := &b.Func.Config.Types
// match: (Rsh8x8 x y)
// cond: shiftIsBounded(v)
- // result: (SRAW (MOVBreg x) y)
+ // result: (SRAD (MOVBreg x) y)
for {
x := v_0
y := v_1
if !(shiftIsBounded(v)) {
break
}
- v.reset(OpPPC64SRAW)
+ v.reset(OpPPC64SRAD)
v0 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
v0.AddArg(x)
v.AddArg2(v0, y)
return true
}
- // match: (Rsh8x8 x y)
- // result: (SRAW (SignExt8to32 x) (ISEL [0] y (MOVDconst [-1]) (CMPU (ZeroExt8to64 y) (MOVDconst [8]))))
+ // match: (Rsh8x8 <t> x y)
+ // result: (ISEL [2] (SRAD <t> (MOVBreg x) y) (SRADconst <t> (MOVBreg x) [7]) (Select1 <types.TypeFlags> (ANDCCconst [0x00F8] y)))
for {
+ t := v.Type
x := v_0
y := v_1
- v.reset(OpPPC64SRAW)
- v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
- v0.AddArg(x)
- v1 := b.NewValue0(v.Pos, OpPPC64ISEL, typ.Int32)
- v1.AuxInt = int32ToAuxInt(0)
- v2 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v2.AuxInt = int64ToAuxInt(-1)
- v3 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
- v4 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
+ v.reset(OpPPC64ISEL)
+ v.AuxInt = int32ToAuxInt(2)
+ v0 := b.NewValue0(v.Pos, OpPPC64SRAD, t)
+ v1 := b.NewValue0(v.Pos, OpPPC64MOVBreg, typ.Int64)
+ v1.AddArg(x)
+ v0.AddArg2(v1, y)
+ v2 := b.NewValue0(v.Pos, OpPPC64SRADconst, t)
+ v2.AuxInt = int64ToAuxInt(7)
+ v2.AddArg(v1)
+ v3 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
+ v4 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
+ v4.AuxInt = int64ToAuxInt(0x00F8)
v4.AddArg(y)
- v5 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
- v5.AuxInt = int64ToAuxInt(8)
- v3.AddArg2(v4, v5)
- v1.AddArg3(y, v2, v3)
- v.AddArg2(v0, v1)
+ v3.AddArg(v4)
+ v.AddArg3(v0, v2, v3)
return true
}
}
v.AddArg(x)
return true
}
- // match: (Select0 (ANDCCconst [c] (Select0 (ANDCCconst [d] x))))
- // result: (Select0 (ANDCCconst [c&d] x))
- for {
- if v_0.Op != OpPPC64ANDCCconst {
- break
- }
- c := auxIntToInt64(v_0.AuxInt)
- v_0_0 := v_0.Args[0]
- if v_0_0.Op != OpSelect0 {
- break
- }
- v_0_0_0 := v_0_0.Args[0]
- if v_0_0_0.Op != OpPPC64ANDCCconst {
- break
- }
- d := auxIntToInt64(v_0_0_0.AuxInt)
- x := v_0_0_0.Args[0]
- v.reset(OpSelect0)
- v0 := b.NewValue0(v.Pos, OpPPC64ANDCCconst, types.NewTuple(typ.Int, types.TypeFlags))
- v0.AuxInt = int64ToAuxInt(c & d)
- v0.AddArg(x)
- v.AddArg(v0)
- return true
- }
// match: (Select0 (ANDCCconst [-1] x))
// result: x
for {
v.copyOf(x)
return true
}
+ // match: (Select1 (ANDCCconst [0] _))
+ // result: (FlagEQ)
+ for {
+ if v_0.Op != OpPPC64ANDCCconst || auxIntToInt64(v_0.AuxInt) != 0 {
+ break
+ }
+ v.reset(OpPPC64FlagEQ)
+ return true
+ }
return false
}
func rewriteValuePPC64_OpSelectN(v *Value) bool {