8a, 8l: add EMMS instruction

R=golang-dev, rsc
CC=golang-dev
https://golang.org/cl/5673081

diff --git a/src/cmd/8a/lex.c b/src/cmd/8a/lex.c
index 3d635d3b8580376c669c1a394ccb5351df8f8ad4..1cc6e591dd010d1236a7ba7ce8282b520d74d2e7 100644 (file)
--- a/src/cmd/8a/lex.c
+++ b/src/cmd/8a/lex.c
@@ -666,6 +666,7 @@ struct
        "LFENCE",       LTYPE0, ALFENCE,
        "MFENCE",       LTYPE0, AMFENCE,
        "SFENCE",       LTYPE0, ASFENCE,
+       "EMMS",         LTYPE0, AEMMS,
 
        0
 };

diff --git a/src/cmd/8l/8.out.h b/src/cmd/8l/8.out.h
index 055345351298d5b96f44e70d599f9cd89aeaa875..066192ef478eb75ff80083661513ac99d17d4d74 100644 (file)
--- a/src/cmd/8l/8.out.h
+++ b/src/cmd/8l/8.out.h
@@ -449,6 +449,8 @@ enum        as
        AMFENCE,
        ASFENCE,
 
+       AEMMS,
+
        ALAST
 };
 

diff --git a/src/cmd/8l/optab.c b/src/cmd/8l/optab.c
index 9505972cbf12b38fc358a27ef5aee5c6d891a762..856482290dfc3f3d2e06b68dbfbb1b3466247fa6 100644 (file)
--- a/src/cmd/8l/optab.c
+++ b/src/cmd/8l/optab.c
@@ -759,5 +759,7 @@ Optab optab[] =
        { AMFENCE, ynone, Pm, 0xae,0xf0 },
        { ASFENCE, ynone, Pm, 0xae,0xf8 },
 
+       { AEMMS, ynone, Pm, 0x77 },
+
        0
 };

diff --git a/src/libmach/8db.c b/src/libmach/8db.c
index a5d147a8e2d23e30ff37d369ef11193b13c713d3..3101e137301f4099cf8fa8bf427621217353e69f 100644 (file)
--- a/src/libmach/8db.c
+++ b/src/libmach/8db.c
@@ -688,6 +688,7 @@ static Optable optab0F[256]=
 [0x74] =       { RM,0,         "PCMPEQB %m,%M" },
 [0x75] =       { RM,0,         "PCMPEQW %m,%M" },
 [0x76] =       { RM,0,         "PCMPEQL %m,%M" },
+[0x77] =       { 0,0,          "EMMS" },
 [0x7E] =       { RM,0,         "MOV%S %M,%e" },
 [0x7F] =       { RM,0,         "MOVQ %M,%m" },
 [0xAE] =       { RMOP,0,               optab0FAE },

diff --git a/src/pkg/sync/atomic/asm_386.s b/src/pkg/sync/atomic/asm_386.s
index d149eb66abea3fc69ae2e300933a21e2892100e0..a406852f4a8ff86501101fe7ee62b07a28356af2 100644 (file)
--- a/src/pkg/sync/atomic/asm_386.s
+++ b/src/pkg/sync/atomic/asm_386.s
@@ -108,8 +108,7 @@ TEXT ·LoadUint64(SB),7,$0
        BYTE $0x0f; BYTE $0x6f; BYTE $0x00
        // MOVQ %MM0, 0x8(%ESP)
        BYTE $0x0f; BYTE $0x7f; BYTE $0x44; BYTE $0x24; BYTE $0x08
-       // EMMS
-       BYTE $0x0F; BYTE $0x77
+       EMMS
        RET
 
 TEXT ·LoadUintptr(SB),7,$0
@@ -137,8 +136,7 @@ TEXT ·StoreUint64(SB),7,$0
        BYTE $0x0f; BYTE $0x6f; BYTE $0x44; BYTE $0x24; BYTE $0x08
        // MOVQ %MM0, (%EAX)
        BYTE $0x0f; BYTE $0x7f; BYTE $0x00 
-       // EMMS
-       BYTE $0x0F; BYTE $0x77
+       EMMS
        // This is essentially a no-op, but it provides required memory fencing.
        // It can be replaced with MFENCE, but MFENCE was introduced only on the Pentium4 (SSE2).
        XORL    AX, AX