From: Joel Sing <joel@sing.id.au>
Date: Wed, 17 Feb 2021 10:03:59 +0000 (+1100)
Subject: cmd/internal/obj/riscv: prevent constant loads that do not target registers
X-Git-Tag: go1.17beta1~1437
X-Git-Url: http://www.git.cypherpunks.su/?a=commitdiff_plain;h=0398a771d2;p=gostls13.git

cmd/internal/obj/riscv: prevent constant loads that do not target registers

Check that the target of a constant load is a register and add test coverage
for this error condition. While here, rename the RISC-V testdata and tests
to be consistent with other platforms.

Change-Id: I7fd0bfcee8cf9df0597d72e65cd74a2d0bfd349a
Reviewed-on: https://go-review.googlesource.com/c/go/+/292895
Trust: Joel Sing <joel@sing.id.au>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Go Bot <gobot@golang.org>
---

diff --git a/src/cmd/asm/internal/asm/endtoend_test.go b/src/cmd/asm/internal/asm/endtoend_test.go
index a4153f3af1..92cf64575b 100644
--- a/src/cmd/asm/internal/asm/endtoend_test.go
+++ b/src/cmd/asm/internal/asm/endtoend_test.go
@@ -439,8 +439,12 @@ func TestPPC64EndToEnd(t *testing.T) {
 	testEndToEnd(t, "ppc64", "ppc64")
 }
 
-func TestRISCVEncoder(t *testing.T) {
-	testEndToEnd(t, "riscv64", "riscvenc")
+func TestRISCVEndToEnd(t *testing.T) {
+	testEndToEnd(t, "riscv64", "riscv64")
+}
+
+func TestRISCVErrors(t *testing.T) {
+	testErrors(t, "riscv64", "riscv64error")
 }
 
 func TestS390XEndToEnd(t *testing.T) {
diff --git a/src/cmd/asm/internal/asm/testdata/riscvenc.s b/src/cmd/asm/internal/asm/testdata/riscv64.s
similarity index 100%
rename from src/cmd/asm/internal/asm/testdata/riscvenc.s
rename to src/cmd/asm/internal/asm/testdata/riscv64.s
diff --git a/src/cmd/asm/internal/asm/testdata/riscv64error.s b/src/cmd/asm/internal/asm/testdata/riscv64error.s
new file mode 100644
index 0000000000..fb43e68fc1
--- /dev/null
+++ b/src/cmd/asm/internal/asm/testdata/riscv64error.s
@@ -0,0 +1,14 @@
+// Copyright 2021 The Go Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+
+TEXT errors(SB),$0
+	MOV	$0, 0(SP)			// ERROR "constant load must target register"
+	MOV	$0, 8(SP)			// ERROR "constant load must target register"
+	MOV	$1234, 0(SP)			// ERROR "constant load must target register"
+	MOV	$1234, 8(SP)			// ERROR "constant load must target register"
+	MOVB	$1, X5				// ERROR "unsupported constant load"
+	MOVH	$1, X5				// ERROR "unsupported constant load"
+	MOVW	$1, X5				// ERROR "unsupported constant load"
+	MOVF	$1, X5				// ERROR "unsupported constant load"
+	RET
diff --git a/src/cmd/internal/obj/riscv/obj.go b/src/cmd/internal/obj/riscv/obj.go
index d104f1cfa5..391c2486ca 100644
--- a/src/cmd/internal/obj/riscv/obj.go
+++ b/src/cmd/internal/obj/riscv/obj.go
@@ -302,7 +302,10 @@ func rewriteMOV(ctxt *obj.Link, newprog obj.ProgAlloc, p *obj.Prog) {
 		//   LUI top20bits(c), R
 		//   ADD bottom12bits(c), R, R
 		if p.As != AMOV {
-			ctxt.Diag("unsupported constant load at %v", p)
+			ctxt.Diag("%v: unsupported constant load", p)
+		}
+		if p.To.Type != obj.TYPE_REG {
+			ctxt.Diag("%v: constant load must target register", p)
 		}
 		off := p.From.Offset
 		to := p.To