From: fanzha02 Date: Wed, 14 Jun 2017 06:24:18 +0000 (+0000) Subject: cmd/internal/obj/arm64: fix assemble stxr/stxrw/stxrb/stxrh bug X-Git-Tag: go1.10beta1~1553 X-Git-Url: http://www.git.cypherpunks.su/?a=commitdiff_plain;h=6e8b10397b824b0064ff92977bd379b332a24da4;p=gostls13.git cmd/internal/obj/arm64: fix assemble stxr/stxrw/stxrb/stxrh bug The stxr/stxrw/stxrb/stxrh instructions belong to STLXR-like instructions set and they require special handling. The current code has no special handling for those instructions. The fix adds the special handling for those instructions. Uncomment stxr/stxrw/stxrb/stxrh test cases. Fixes #21397 Change-Id: I31cee29dd6b30b1c25badd5c7574dda7a01bf016 Reviewed-on: https://go-review.googlesource.com/54951 Run-TryBot: Cherry Zhang TryBot-Result: Gobot Gobot Reviewed-by: Cherry Zhang --- diff --git a/src/cmd/asm/internal/arch/arm64.go b/src/cmd/asm/internal/arch/arm64.go index dd04719451..b46ae9d5f8 100644 --- a/src/cmd/asm/internal/arch/arm64.go +++ b/src/cmd/asm/internal/arch/arm64.go @@ -67,7 +67,8 @@ func IsARM64CMP(op obj.As) bool { // handling. func IsARM64STLXR(op obj.As) bool { switch op { - case arm64.ASTLXRB, arm64.ASTLXRH, arm64.ASTLXRW, arm64.ASTLXR: + case arm64.ASTLXRB, arm64.ASTLXRH, arm64.ASTLXRW, arm64.ASTLXR, + arm64.ASTXRB, arm64.ASTXRH, arm64.ASTXRW, arm64.ASTXR: return true } return false diff --git a/src/cmd/asm/internal/asm/testdata/arm64enc.s b/src/cmd/asm/internal/asm/testdata/arm64enc.s index ec89474990..52663e2b52 100644 --- a/src/cmd/asm/internal/asm/testdata/arm64enc.s +++ b/src/cmd/asm/internal/asm/testdata/arm64enc.s @@ -345,10 +345,10 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$-8 //TODO STTRH 9(R10), R18 // 52990078 //TODO STXP (R20), R18, R5, ZR // 854a3f88 //TODO STXP (R22), R9, R17, R0 // d12620c8 - // STXRW R2, (R19), R18 // 627e1288 - // STXR R15, (R21), R13 // af7e0dc8 - // STXRB R7, (R9), R24 // 277d1808 - // STXRH R12, (R3), R8 // 6c7c0848 + STXRW R2, (R19), R18 // 627e1288 + STXR R15, (R21), R13 // af7e0dc8 + STXRB R7, (R9), R24 // 277d1808 + STXRH R12, (R3), R8 // 6c7c0848 //TODO SUBW R20.UXTW<<7, R23, R18 // f25e344b //TODO SUB R5.SXTW<<2, R1, R26 // 3ac825cb SUB $(1923<<12), R4, R27 // SUB $7876608, R4, R27 // 9b0c5ed1