From: Ilya Tocar Date: Thu, 1 Mar 2018 18:52:21 +0000 (-0600) Subject: crypto: remove hand encoded amd64 instructions X-Git-Tag: go1.11beta1~1388 X-Git-Url: http://www.git.cypherpunks.su/?a=commitdiff_plain;h=93665c0d81c4e675e8c9b86b4e43654a9504edbc;p=gostls13.git crypto: remove hand encoded amd64 instructions Replace BYTE.. encodings with asm. This is possible due to asm implementing more instructions and removal of MOV $0, reg -> XOR reg, reg transformation from asm. Change-Id: I011749ab6b3f64403ab6e746f3760c5841548b57 Reviewed-on: https://go-review.googlesource.com/97936 Run-TryBot: Ilya Tocar Reviewed-by: Brad Fitzpatrick TryBot-Result: Gobot Gobot --- diff --git a/src/crypto/elliptic/p256_asm_amd64.s b/src/crypto/elliptic/p256_asm_amd64.s index 3f9d624270..c8adc7b6a6 100644 --- a/src/crypto/elliptic/p256_asm_amd64.s +++ b/src/crypto/elliptic/p256_asm_amd64.s @@ -1486,7 +1486,7 @@ TEXT p256MulInternal(SB),NOSPLIT,$0 ADCQ mul0, acc2 ADCQ $0, mul1 MOVQ mul1, acc3 - BYTE $0x48; BYTE $0xc7; BYTE $0xc5; BYTE $0x00; BYTE $0x00; BYTE $0x00; BYTE $0x00 // MOVQ $0, BP + MOVQ $0, BP // Add bits [511:256] of the result ADCQ acc0, acc4 ADCQ acc1, acc5 @@ -1628,7 +1628,7 @@ TEXT p256SqrInternal(SB),NOSPLIT,$0 ADCQ mul0, acc2 ADCQ $0, mul1 MOVQ mul1, acc3 - BYTE $0x48; BYTE $0xc7; BYTE $0xc5; BYTE $0x00; BYTE $0x00; BYTE $0x00; BYTE $0x00 // MOVQ $0, BP + MOVQ $0, BP // Add bits [511:256] of the result ADCQ acc0, t0 ADCQ acc1, t1 diff --git a/src/hash/crc32/crc32_amd64.s b/src/hash/crc32/crc32_amd64.s index d49093602e..a944ead9b2 100644 --- a/src/hash/crc32/crc32_amd64.s +++ b/src/hash/crc32/crc32_amd64.s @@ -37,8 +37,7 @@ align_2: BTQ $1, BX JNC align_4 - // CRC32W (SI), AX - BYTE $0x66; BYTE $0xf2; BYTE $0x0f; BYTE $0x38; BYTE $0xf1; BYTE $0x06 + CRC32W (SI), AX SUBQ $2, CX ADDQ $2, SI @@ -47,8 +46,7 @@ align_4: BTQ $2, BX JNC aligned - // CRC32L (SI), AX - BYTE $0xf2; BYTE $0x0f; BYTE $0x38; BYTE $0xf1; BYTE $0x06 + CRC32L (SI), AX SUBQ $4, CX ADDQ $4, SI @@ -68,16 +66,14 @@ less_than_8: BTQ $2, CX JNC less_than_4 - // CRC32L (SI), AX - BYTE $0xf2; BYTE $0x0f; BYTE $0x38; BYTE $0xf1; BYTE $0x06 + CRC32L (SI), AX ADDQ $4, SI less_than_4: BTQ $1, CX JNC less_than_2 - // CRC32W (SI), AX - BYTE $0x66; BYTE $0xf2; BYTE $0x0f; BYTE $0x38; BYTE $0xf1; BYTE $0x06 + CRC32W (SI), AX ADDQ $2, SI less_than_2: