From: Ben Shi <ben.shi@streamcomputing.com>
Date: Mon, 28 Mar 2022 11:40:02 +0000 (+0000)
Subject: cmd/internal/obj/riscv: add two-operand form to more instructions
X-Git-Tag: go1.19beta1~889
X-Git-Url: http://www.git.cypherpunks.su/?a=commitdiff_plain;h=94727bed02d59b6a40757ba583f61d1b03493e5d;p=gostls13.git

cmd/internal/obj/riscv: add two-operand form to more instructions

Add two-operand form "op rs, rd" to
ADDW/SUBW/SLLW/SRLW/SRAW/SLLIW/SRLIW/SRAIW.

Do the following map:
"ADDW $imm, rd" -> "ADDIW $imm, rd"
"SLLW $imm, rd" -> "SLLIW $imm, rd"
"SRLW $imm, rd" -> "SRLIW $imm, rd"
"SRAW $imm, rd" -> "SRAIW $imm, rd"

Change-Id: Ie9632ba198ba8c05faac91504e4b97fc45ca1196
GitHub-Last-Rev: c6ccc9d5d0612ede1a1ffebb6bbc0309da87f4e1
GitHub-Pull-Request: golang/go#51984
Reviewed-on: https://go-review.googlesource.com/c/go/+/396134
Run-TryBot: Ben Shi <powerman1st@163.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: Joel Sing <joel@sing.id.au>
---

diff --git a/src/cmd/asm/internal/asm/testdata/riscv64.s b/src/cmd/asm/internal/asm/testdata/riscv64.s
index fe911a74f5..79d6054869 100644
--- a/src/cmd/asm/internal/asm/testdata/riscv64.s
+++ b/src/cmd/asm/internal/asm/testdata/riscv64.s
@@ -145,6 +145,19 @@ start:
 	SRLW	X5, X6, X7				// bb535300
 	SUBW	X5, X6, X7				// bb035340
 	SRAW	X5, X6, X7				// bb535340
+	ADDIW	$1, X6					// 1b031300
+	SLLIW	$1, X6					// 1b131300
+	SRLIW	$1, X6					// 1b531300
+	SRAIW	$1, X6					// 1b531340
+	ADDW	X5, X7					// bb835300
+	SLLW	X5, X7					// bb935300
+	SRLW	X5, X7					// bbd35300
+	SUBW	X5, X7					// bb835340
+	SRAW	X5, X7					// bbd35340
+	ADDW	$1, X6					// 1b031300
+	SLLW	$1, X6					// 1b131300
+	SRLW	$1, X6					// 1b531300
+	SRAW	$1, X6					// 1b531340
 
 	// 5.3: Load and Store Instructions (RV64I)
 	LD	(X5), X6				// 03b30200
diff --git a/src/cmd/internal/obj/riscv/obj.go b/src/cmd/internal/obj/riscv/obj.go
index 9f16de0c8c..47dbfc0fed 100644
--- a/src/cmd/internal/obj/riscv/obj.go
+++ b/src/cmd/internal/obj/riscv/obj.go
@@ -53,6 +53,7 @@ func progedit(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc) {
 	if p.Reg == obj.REG_NONE {
 		switch p.As {
 		case AADDI, ASLTI, ASLTIU, AANDI, AORI, AXORI, ASLLI, ASRLI, ASRAI,
+			AADDIW, ASLLIW, ASRLIW, ASRAIW, AADDW, ASUBW, ASLLW, ASRLW, ASRAW,
 			AADD, AAND, AOR, AXOR, ASLL, ASRL, ASUB, ASRA,
 			AMUL, AMULH, AMULHU, AMULHSU, AMULW, ADIV, ADIVU, ADIVW, ADIVUW,
 			AREM, AREMU, AREMW, AREMUW:
@@ -82,6 +83,14 @@ func progedit(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc) {
 			p.As = ASRLI
 		case ASRA:
 			p.As = ASRAI
+		case AADDW:
+			p.As = AADDIW
+		case ASLLW:
+			p.As = ASLLIW
+		case ASRLW:
+			p.As = ASRLIW
+		case ASRAW:
+			p.As = ASRAIW
 		}
 	}