From: Dave Cheney Date: Wed, 22 Oct 2014 01:30:15 +0000 (+1100) Subject: runtime/cgo: encode BLX directly, fixes one clang build error on arm X-Git-Tag: go1.4beta1~59 X-Git-Url: http://www.git.cypherpunks.su/?a=commitdiff_plain;h=d1b2913710f9f238f480a332cfc421f416bf8c23;p=gostls13.git runtime/cgo: encode BLX directly, fixes one clang build error on arm Fixes #8348. Trying to work around clang's dodgy support for .arch by reverting to the external assembler didn't work out so well. Minux had a much better solution to encode the instructions we need as .word directives which avoids .arch altogether. I've confirmed with gdb that this form produces the expected machine code Dump of assembler code for function crosscall_arm1: 0x00000000 <+0>: push {r4, r5, r6, r7, r8, r9, r10, r11, r12, lr} 0x00000004 <+4>: mov r4, r0 0x00000008 <+8>: mov r5, r1 0x0000000c <+12>: mov r0, r2 0x00000010 <+16>: blx r5 0x00000014 <+20>: blx r4 0x00000018 <+24>: pop {r4, r5, r6, r7, r8, r9, r10, r11, r12, pc} There is another compilation failure that blocks building Go with clang on arm # ../misc/cgo/test # _/home/dfc/go/misc/cgo/test /tmp/--407b12.s: Assembler messages: /tmp/--407b12.s:59: Error: selected processor does not support ARM mode `blx r0' clang: error: assembler command failed with exit code 1 (use -v to see invocation) FAIL _/home/dfc/go/misc/cgo/test [build failed] I'll open a new issue for that LGTM=iant R=iant, minux CC=golang-codereviews https://golang.org/cl/158180047 --- diff --git a/src/runtime/cgo/gcc_arm.S b/src/runtime/cgo/gcc_arm.S index 2e4b3528ba..d5833bfad0 100644 --- a/src/runtime/cgo/gcc_arm.S +++ b/src/runtime/cgo/gcc_arm.S @@ -11,13 +11,6 @@ #define EXT(s) s #endif -/* - * Because the assembler might target an earlier revision of the ISA - * by default, we must explicitly specify the ISA revision to ensure - * BLX is recognized as a valid instruction. - */ -.arch armv5t - /* * void crosscall_arm1(void (*fn)(void), void (*setg_gcc)(void *g), void *g) * @@ -31,8 +24,12 @@ EXT(crosscall_arm1): mov r4, r0 mov r5, r1 mov r0, r2 - blx r5 // setg(g) - blx r4 // fn() + + // Because the assembler might target an earlier revision of the ISA + // by default, we encode BLX as a .word. + .word 0xe12fff35 // blx r5 // setg(g) + .word 0xe12fff34 // blx r4 // fn() + pop {r4, r5, r6, r7, r8, r9, r10, r11, ip, pc} .globl EXT(__stack_chk_fail_local)