From 0ae3b7cb742c586df9b68d9eac042b32148abf9c Mon Sep 17 00:00:00 2001 From: Lynn Boger Date: Mon, 16 Nov 2020 09:40:45 -0500 Subject: [PATCH] cmd/compile: fix rules regression with shifts on PPC64 Some rules for PPC64 were checking for a case where a shift followed by an 'and' of a mask could be lowered, depending on the format of the mask. The function to verify if the mask was valid for this purpose was not checking if the mask was 0 which we don't want to allow. This case can happen if previous optimizations resulted in that mask value. This fixes isPPC64ValidShiftMask to check for a mask of 0 and return false. This also adds a codegen testcase to verify it doesn't try to match the rules in the future. Fixes #42610 Change-Id: I565d94e88495f51321ab365d6388c01e791b4dbb Reviewed-on: https://go-review.googlesource.com/c/go/+/270358 Run-TryBot: Lynn Boger TryBot-Result: Go Bot Reviewed-by: Paul Murphy Reviewed-by: Carlos Eduardo Seo Trust: Lynn Boger --- src/cmd/compile/internal/ssa/rewrite.go | 7 +++--- test/codegen/issue42610.go | 30 +++++++++++++++++++++++++ 2 files changed, 34 insertions(+), 3 deletions(-) create mode 100644 test/codegen/issue42610.go diff --git a/src/cmd/compile/internal/ssa/rewrite.go b/src/cmd/compile/internal/ssa/rewrite.go index 39aa63d947..24efd38fb7 100644 --- a/src/cmd/compile/internal/ssa/rewrite.go +++ b/src/cmd/compile/internal/ssa/rewrite.go @@ -1427,10 +1427,11 @@ func DecodePPC64RotateMask(sauxint int64) (rotate, mb, me int64, mask uint64) { return } -// This verifies that the mask occupies the -// rightmost bits. +// This verifies that the mask is a set of +// consecutive bits including the least +// significant bit. func isPPC64ValidShiftMask(v int64) bool { - if ((v + 1) & v) == 0 { + if (v != 0) && ((v+1)&v) == 0 { return true } return false diff --git a/test/codegen/issue42610.go b/test/codegen/issue42610.go new file mode 100644 index 0000000000..c7eeddc53c --- /dev/null +++ b/test/codegen/issue42610.go @@ -0,0 +1,30 @@ +// asmcheck + +// Copyright 2020 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +// Don't allow 0 masks in shift lowering rules on ppc64x. +// See issue 42610. + +package codegen + +func f32(a []int32, i uint32) { + g := func(p int32) int32 { + i = uint32(p) * (uint32(p) & (i & 1)) + return 1 + } + // ppc64le: -"RLWNIM" + // ppc64: -"RLWNIM" + a[0] = g(8) >> 1 +} + +func f(a []int, i uint) { + g := func(p int) int { + i = uint(p) * (uint(p) & (i & 1)) + return 1 + } + // ppc64le: -"RLDIC" + // ppc64: -"RLDIC" + a[0] = g(8) >> 1 +} -- 2.48.1