From 49f16625c82483ab26929a2761031c93dd5d2c83 Mon Sep 17 00:00:00 2001
From: fanzha02 <fannie.zhang@arm.com>
Date: Mon, 14 Mar 2022 02:40:25 +0000
Subject: [PATCH] cmd/internal/obj/arm64: add TRN1 and TRN2 instructions
 support

Add test cases.

Fixes #51628

Change-Id: I433367d87e6bb5da5579c4be540079b92701c1fa
Reviewed-on: https://go-review.googlesource.com/c/go/+/392294
Trust: Josh Bleecher Snyder <josharian@gmail.com>
Reviewed-by: Josh Bleecher Snyder <josharian@gmail.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Trust: Fannie Zhang <Fannie.Zhang@arm.com>
---
 src/cmd/asm/internal/asm/testdata/arm64.s | 4 ++++
 src/cmd/internal/obj/arm64/a.out.go       | 2 ++
 src/cmd/internal/obj/arm64/anames.go      | 2 ++
 src/cmd/internal/obj/arm64/asm7.go        | 8 ++++++++
 4 files changed, 16 insertions(+)

diff --git a/src/cmd/asm/internal/asm/testdata/arm64.s b/src/cmd/asm/internal/asm/testdata/arm64.s
index a4b56b0696..8a7dd299aa 100644
--- a/src/cmd/asm/internal/asm/testdata/arm64.s
+++ b/src/cmd/asm/internal/asm/testdata/arm64.s
@@ -241,6 +241,10 @@ TEXT	foo(SB), DUPOK|NOSPLIT, $-8
 	FADDS	F2, F3, F4                      // 6428221e
 	FADDD	F1, F2                          // 4228611e
 	VDUP	V19.S[0], V17.S4                // 7106044e
+	VTRN1	V3.D2, V2.D2, V20.D2            // 5428c34e
+	VTRN2	V3.D2, V2.D2, V21.D2            // 5568c34e
+	VTRN1	V5.D2, V4.D2, V22.D2            // 9628c54e
+	VTRN2	V5.D2, V4.D2, V23.D2            // 9768c54e
 
 
 // special
diff --git a/src/cmd/internal/obj/arm64/a.out.go b/src/cmd/internal/obj/arm64/a.out.go
index aa7c54df9a..f3480e0f5e 100644
--- a/src/cmd/internal/obj/arm64/a.out.go
+++ b/src/cmd/internal/obj/arm64/a.out.go
@@ -1053,6 +1053,8 @@ const (
 	AVUADDW2
 	AVUADDW
 	AVUSRA
+	AVTRN1
+	AVTRN2
 	ALAST
 	AB  = obj.AJMP
 	ABL = obj.ACALL
diff --git a/src/cmd/internal/obj/arm64/anames.go b/src/cmd/internal/obj/arm64/anames.go
index 9cc5871648..ab97a1a130 100644
--- a/src/cmd/internal/obj/arm64/anames.go
+++ b/src/cmd/internal/obj/arm64/anames.go
@@ -537,5 +537,7 @@ var Anames = []string{
 	"VUADDW2",
 	"VUADDW",
 	"VUSRA",
+	"VTRN1",
+	"VTRN2",
 	"LAST",
 }
diff --git a/src/cmd/internal/obj/arm64/asm7.go b/src/cmd/internal/obj/arm64/asm7.go
index 5435b2248f..244430eb8f 100644
--- a/src/cmd/internal/obj/arm64/asm7.go
+++ b/src/cmd/internal/obj/arm64/asm7.go
@@ -2985,6 +2985,8 @@ func buildop(ctxt *obj.Link) {
 
 		case AVZIP1:
 			oprangeset(AVZIP2, t)
+			oprangeset(AVTRN1, t)
+			oprangeset(AVTRN2, t)
 
 		case AVUXTL:
 			oprangeset(AVUXTL2, t)
@@ -6179,6 +6181,12 @@ func (c *ctxt7) oprrr(p *obj.Prog, a obj.As) uint32 {
 
 	case AVUADDW, AVUADDW2:
 		return 0x17<<25 | 1<<21 | 1<<12
+
+	case AVTRN1:
+		return 7<<25 | 5<<11
+
+	case AVTRN2:
+		return 7<<25 | 1<<14 | 5<<11
 	}
 
 	c.ctxt.Diag("%v: bad rrr %d %v", p, a, a)
-- 
2.48.1