From 6aeddb1b5751136d1b2c1e28c4026fb57a832c18 Mon Sep 17 00:00:00 2001 From: Alberto Donizetti Date: Wed, 21 Feb 2018 17:48:33 +0100 Subject: [PATCH] cmd/compile: intrinsify math.Sqrt on mips64 Fixes #24006 Change-Id: Ic1438b121fe705f9a6e3ed8340882e9dfd26ecf7 Reviewed-on: https://go-review.googlesource.com/95916 Reviewed-by: Cherry Zhang Run-TryBot: Cherry Zhang --- src/cmd/compile/internal/gc/ssa.go | 2 +- src/cmd/compile/internal/mips64/ssa.go | 3 ++- src/cmd/compile/internal/ssa/gen/MIPS64.rules | 2 ++ src/cmd/compile/internal/ssa/gen/MIPS64Ops.go | 7 ++++--- src/cmd/compile/internal/ssa/opGen.go | 14 ++++++++++++++ src/cmd/compile/internal/ssa/rewriteMIPS64.go | 13 +++++++++++++ 6 files changed, 36 insertions(+), 5 deletions(-) diff --git a/src/cmd/compile/internal/gc/ssa.go b/src/cmd/compile/internal/gc/ssa.go index 542acb6da2..a740e455c9 100644 --- a/src/cmd/compile/internal/gc/ssa.go +++ b/src/cmd/compile/internal/gc/ssa.go @@ -2913,7 +2913,7 @@ func init() { func(s *state, n *Node, args []*ssa.Value) *ssa.Value { return s.newValue1(ssa.OpSqrt, types.Types[TFLOAT64], args[0]) }, - sys.AMD64, sys.ARM, sys.ARM64, sys.MIPS, sys.PPC64, sys.S390X) + sys.AMD64, sys.ARM, sys.ARM64, sys.MIPS, sys.MIPS64, sys.PPC64, sys.S390X) addF("math", "Trunc", func(s *state, n *Node, args []*ssa.Value) *ssa.Value { return s.newValue1(ssa.OpTrunc, types.Types[TFLOAT64], args[0]) diff --git a/src/cmd/compile/internal/mips64/ssa.go b/src/cmd/compile/internal/mips64/ssa.go index ff2f61280f..8f35fd039a 100644 --- a/src/cmd/compile/internal/mips64/ssa.go +++ b/src/cmd/compile/internal/mips64/ssa.go @@ -354,7 +354,8 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) { ssa.OpMIPS64MOVFD, ssa.OpMIPS64MOVDF, ssa.OpMIPS64NEGF, - ssa.OpMIPS64NEGD: + ssa.OpMIPS64NEGD, + ssa.OpMIPS64SQRTD: p := s.Prog(v.Op.Asm()) p.From.Type = obj.TYPE_REG p.From.Reg = v.Args[0].Reg() diff --git a/src/cmd/compile/internal/ssa/gen/MIPS64.rules b/src/cmd/compile/internal/ssa/gen/MIPS64.rules index 1834811770..4f7a54d09c 100644 --- a/src/cmd/compile/internal/ssa/gen/MIPS64.rules +++ b/src/cmd/compile/internal/ssa/gen/MIPS64.rules @@ -111,6 +111,8 @@ (Com(64|32|16|8) x) -> (NOR (MOVVconst [0]) x) +(Sqrt x) -> (SQRTD x) + // boolean ops -- booleans are represented with 0=false, 1=true (AndB x y) -> (AND x y) (OrB x y) -> (OR x y) diff --git a/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go b/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go index b13ebb434e..163a88c8fe 100644 --- a/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go +++ b/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go @@ -189,9 +189,10 @@ func init() { {name: "NOR", argLength: 2, reg: gp21, asm: "NOR", commutative: true}, // ^(arg0 | arg1) {name: "NORconst", argLength: 1, reg: gp11, asm: "NOR", aux: "Int64"}, // ^(arg0 | auxInt) - {name: "NEGV", argLength: 1, reg: gp11}, // -arg0 - {name: "NEGF", argLength: 1, reg: fp11, asm: "NEGF"}, // -arg0, float32 - {name: "NEGD", argLength: 1, reg: fp11, asm: "NEGD"}, // -arg0, float64 + {name: "NEGV", argLength: 1, reg: gp11}, // -arg0 + {name: "NEGF", argLength: 1, reg: fp11, asm: "NEGF"}, // -arg0, float32 + {name: "NEGD", argLength: 1, reg: fp11, asm: "NEGD"}, // -arg0, float64 + {name: "SQRTD", argLength: 1, reg: fp11, asm: "SQRTD"}, // sqrt(arg0), float64 // shifts {name: "SLLV", argLength: 2, reg: gp21, asm: "SLLV"}, // arg0 << arg1, shift amount is mod 64 diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go index 95d50c0672..ceb57a86ba 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go @@ -1272,6 +1272,7 @@ const ( OpMIPS64NEGV OpMIPS64NEGF OpMIPS64NEGD + OpMIPS64SQRTD OpMIPS64SLLV OpMIPS64SLLVconst OpMIPS64SRLV @@ -16320,6 +16321,19 @@ var opcodeTable = [...]opInfo{ }, }, }, + { + name: "SQRTD", + argLen: 1, + asm: mips.ASQRTD, + reg: regInfo{ + inputs: []inputInfo{ + {0, 1152921504338411520}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ + {0, 1152921504338411520}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + }, + }, { name: "SLLV", argLen: 2, diff --git a/src/cmd/compile/internal/ssa/rewriteMIPS64.go b/src/cmd/compile/internal/ssa/rewriteMIPS64.go index da76c992dd..20a84c03d2 100644 --- a/src/cmd/compile/internal/ssa/rewriteMIPS64.go +++ b/src/cmd/compile/internal/ssa/rewriteMIPS64.go @@ -551,6 +551,8 @@ func rewriteValueMIPS64(v *Value) bool { return rewriteValueMIPS64_OpSignExt8to64_0(v) case OpSlicemask: return rewriteValueMIPS64_OpSlicemask_0(v) + case OpSqrt: + return rewriteValueMIPS64_OpSqrt_0(v) case OpStaticCall: return rewriteValueMIPS64_OpStaticCall_0(v) case OpStore: @@ -9578,6 +9580,17 @@ func rewriteValueMIPS64_OpSlicemask_0(v *Value) bool { return true } } +func rewriteValueMIPS64_OpSqrt_0(v *Value) bool { + // match: (Sqrt x) + // cond: + // result: (SQRTD x) + for { + x := v.Args[0] + v.reset(OpMIPS64SQRTD) + v.AddArg(x) + return true + } +} func rewriteValueMIPS64_OpStaticCall_0(v *Value) bool { // match: (StaticCall [argwid] {target} mem) // cond: -- 2.48.1