From 6e87f8896106c9a673c3c049c83ef389178cef82 Mon Sep 17 00:00:00 2001
From: Vladimir Stefanovic <vladimir.stefanovic@imgtec.com>
Date: Tue, 20 Dec 2016 18:24:40 +0100
Subject: [PATCH] doc: add mips, mips64 information to asm.html

Fixes #18105

Change-Id: Id56e8782ff618761ec44b6dc20891c8b48fea8df
Reviewed-on: https://go-review.googlesource.com/34632
Reviewed-by: Rob Pike <r@golang.org>
---
 doc/asm.html | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/doc/asm.html b/doc/asm.html
index 3e03c548fd..79dc7df322 100644
--- a/doc/asm.html
+++ b/doc/asm.html
@@ -838,6 +838,44 @@ It is a scaled mode as on the x86, but the only scale allowed is <code>1</code>.
 
 </ul>
 
+<h3 id="mips">MIPS, MIPS64</h3>
+
+<p>
+General purpose registers are named <code>R0</code> through <code>R31</code>,
+floating point registers are <code>F0</code> through <code>F31</code>.
+</p>
+
+<p>
+<code>R30</code> is reserved to point to <code>g</code>.
+<code>R23</code> is used as a temporary register.
+</p>
+
+<p>
+In a <code>TEXT</code> directive, the frame size <code>$-4</code> for MIPS or
+<code>$-8</code> for MIPS64 instructs the linker not to save <code>LR</code>.
+</p>
+
+<p>
+<code>SP</code> refers to the virtual stack pointer.
+For the hardware register, use <code>R29</code>.
+</p>
+
+<p>
+Addressing modes:
+</p>
+
+<ul>
+
+<li>
+<code>16(R1)</code>: The location at <code>R1</code> plus 16.
+</li>
+
+<li>
+<code>(R1)</code>: Alias for <code>0(R1)</code>.
+</li>
+
+</ul>
+
 <h3 id="unsupported_opcodes">Unsupported opcodes</h3>
 
 <p>
-- 
2.48.1