From a38c8dfa44f32eb464b826c7f7a50e51f73506e0 Mon Sep 17 00:00:00 2001 From: Ben Shi Date: Mon, 12 Jun 2017 03:42:55 +0000 Subject: [PATCH] cmd/internal/obj/arm: fix MOVW to/from FPSR "MOVW FPSR, g" should be assembled to 0xeef1aa10, but actually 0xee30a110 (RFS). "MOVW g, FPSR" should be 0xeee1aa10, but actually 0xee20a110 (WFS). They should be updated to VFP forms, since the ARM back end doesn't support non-VFP floating points. The patch fixes them and adds more assembly encoding tests. fixes #20643 Change-Id: I3b29490337c6e8d891b400fcedc8b0a87b82b527 Reviewed-on: https://go-review.googlesource.com/45276 Run-TryBot: Cherry Zhang TryBot-Result: Gobot Gobot Reviewed-by: Cherry Zhang --- src/cmd/asm/internal/asm/testdata/arm.s | 102 ++++++++++++++++--- src/cmd/asm/internal/asm/testdata/armerror.s | 4 + src/cmd/asm/internal/asm/testdata/armv6.s | 3 + src/cmd/internal/obj/arm/asm5.go | 8 +- 4 files changed, 98 insertions(+), 19 deletions(-) diff --git a/src/cmd/asm/internal/asm/testdata/arm.s b/src/cmd/asm/internal/asm/testdata/arm.s index 20891f0ab6..e1a75480d1 100644 --- a/src/cmd/asm/internal/asm/testdata/arm.s +++ b/src/cmd/asm/internal/asm/testdata/arm.s @@ -1109,45 +1109,117 @@ jmp_label_3: MVN $0xffffffae, R5 // MVN $4294967214, R5 // 51b0e0e30b50e0e1 MVN.S $0xffffffae, R5 // MVN.S $4294967214, R5 // 51b0e0e30b50f0e1 +// MOVM + MOVM.IA [R0,R2,R4,R6], (R1) // MOVM.U [R0,R2,R4,R6], (R1) // 550081e8 + MOVM.IA [R0-R4,R6,R8,R9-R11], (R1) // MOVM.U [R0,R1,R2,R3,R4,R6,R8,R9,g,R11], (R1) // 5f0f81e8 + MOVM.IA.W [R0,R2,R4,R6], (R1) // MOVM.W.U [R0,R2,R4,R6], (R1) // 5500a1e8 + MOVM.IA.W [R0-R4,R6,R8,R9-R11], (R1) // MOVM.W.U [R0,R1,R2,R3,R4,R6,R8,R9,g,R11], (R1) // 5f0fa1e8 + MOVM.IA (R1), [R0,R2,R4,R6] // MOVM.U (R1), [R0,R2,R4,R6] // 550091e8 + MOVM.IA (R1), [R0-R4,R6,R8,R9-R11] // MOVM.U (R1), [R0,R1,R2,R3,R4,R6,R8,R9,g,R11] // 5f0f91e8 + MOVM.IA.W (R1), [R0,R2,R4,R6] // MOVM.W.U (R1), [R0,R2,R4,R6] // 5500b1e8 + MOVM.IA.W (R1), [R0-R4,R6,R8,R9-R11] // MOVM.W.U (R1), [R0,R1,R2,R3,R4,R6,R8,R9,g,R11] // 5f0fb1e8 + MOVM.DA [R0,R2,R4,R6], (R1) // MOVM [R0,R2,R4,R6], (R1) // 550001e8 + MOVM.DA [R0-R4,R6,R8,R9-R11], (R1) // MOVM [R0,R1,R2,R3,R4,R6,R8,R9,g,R11], (R1) // 5f0f01e8 + MOVM.DA.W [R0,R2,R4,R6], (R1) // MOVM.W [R0,R2,R4,R6], (R1) // 550021e8 + MOVM.DA.W [R0-R4,R6,R8,R9-R11], (R1) // MOVM.W [R0,R1,R2,R3,R4,R6,R8,R9,g,R11], (R1) // 5f0f21e8 + MOVM.DA (R1), [R0,R2,R4,R6] // MOVM (R1), [R0,R2,R4,R6] // 550011e8 + MOVM.DA (R1), [R0-R4,R6,R8,R9-R11] // MOVM (R1), [R0,R1,R2,R3,R4,R6,R8,R9,g,R11] // 5f0f11e8 + MOVM.DA.W (R1), [R0,R2,R4,R6] // MOVM.W (R1), [R0,R2,R4,R6] // 550031e8 + MOVM.DA.W (R1), [R0-R4,R6,R8,R9-R11] // MOVM.W (R1), [R0,R1,R2,R3,R4,R6,R8,R9,g,R11] // 5f0f31e8 + MOVM.DB [R0,R2,R4,R6], (R1) // MOVM.P [R0,R2,R4,R6], (R1) // 550001e9 + MOVM.DB [R0-R4,R6,R8,R9-R11], (R1) // MOVM.P [R0,R1,R2,R3,R4,R6,R8,R9,g,R11], (R1) // 5f0f01e9 + MOVM.DB.W [R0,R2,R4,R6], (R1) // MOVM.P.W [R0,R2,R4,R6], (R1) // 550021e9 + MOVM.DB.W [R0-R4,R6,R8,R9-R11], (R1) // MOVM.P.W [R0,R1,R2,R3,R4,R6,R8,R9,g,R11], (R1) // 5f0f21e9 + MOVM.DB (R1), [R0,R2,R4,R6] // MOVM.P (R1), [R0,R2,R4,R6] // 550011e9 + MOVM.DB (R1), [R0-R4,R6,R8,R9-R11] // MOVM.P (R1), [R0,R1,R2,R3,R4,R6,R8,R9,g,R11] // 5f0f11e9 + MOVM.DB.W (R1), [R0,R2,R4,R6] // MOVM.P.W (R1), [R0,R2,R4,R6] // 550031e9 + MOVM.DB.W (R1), [R0-R4,R6,R8,R9-R11] // MOVM.P.W (R1), [R0,R1,R2,R3,R4,R6,R8,R9,g,R11] // 5f0f31e9 + MOVM.IB [R0,R2,R4,R6], (g) // MOVM.P.U [R0,R2,R4,R6], (g) // 55008ae9 + MOVM.IB [R0-R4,R6,R8,R9-R11], (g) // MOVM.P.U [R0,R1,R2,R3,R4,R6,R8,R9,g,R11], (g) // 5f0f8ae9 + MOVM.IB.W [R0,R2,R4,R6], (g) // MOVM.P.W.U [R0,R2,R4,R6], (g) // 5500aae9 + MOVM.IB.W [R0-R4,R6,R8,R9-R11], (g) // MOVM.P.W.U [R0,R1,R2,R3,R4,R6,R8,R9,g,R11], (g) // 5f0faae9 + MOVM.IB (g), [R0,R2,R4,R6] // MOVM.P.U (g), [R0,R2,R4,R6] // 55009ae9 + MOVM.IB (g), [R0-R4,R6,R8,R9-R11] // MOVM.P.U (g), [R0,R1,R2,R3,R4,R6,R8,R9,g,R11] // 5f0f9ae9 + MOVM.IB.W (g), [R0,R2,R4,R6] // MOVM.P.W.U (g), [R0,R2,R4,R6] // 5500bae9 + MOVM.IB.W (g), [R0-R4,R6,R8,R9-R11] // MOVM.P.W.U (g), [R0,R1,R2,R3,R4,R6,R8,R9,g,R11] // 5f0fbae9 + // MOVW mov_label_0: - MOVW R3, R4 // MOVW R3, R4 // 0340a0e1 - MOVW R9, R2 // MOVW R9, R2 // 0920a0e1 + MOVW R3, R4 // 0340a0e1 + MOVW R9, R2 // 0920a0e1 MOVW $0xff, R9 // MOVW $255, R9 // ff90a0e3 MOVW $0xff000000, R9 // MOVW $4278190080, R9 // ff94a0e3 MOVW $0xff(R0), R1 // MOVW $255(R0), R1 // ff1080e2 MOVW $-0xff(R0), R1 // MOVW $-255(R0), R1 // ff1040e2 MOVW $0xffffffae, R1 // MOVW $4294967214, R1 // 5110e0e3 MOVW $0xaaaaaaaa, R1 // MOVW $2863311530, R1 - MOVW $mov_label_0(SB), R2 // MOVW $mov_label_0(SB), R2 - MOVW R1, (R2) // MOVW R1, (R2) // 001082e5 - MOVW.P R1, (R2) // MOVW.P R1, (R2) // 001082e4 - MOVW.W R1, (R2) // MOVW.W R1, (R2) // 0010a2e5 + MOVW $mov_label_0(SB), R2 + MOVW R1, (R2) // 001082e5 + MOVW.P R1, (R2) // 001082e4 + MOVW.W R1, (R2) // 0010a2e5 MOVW R1, 0x20(R2) // MOVW R1, 32(R2) // 201082e5 MOVW.P R1, 0x20(R2) // MOVW.P R1, 32(R2) // 201082e4 MOVW.W R1, 0x20(R2) // MOVW.W R1, 32(R2) // 2010a2e5 MOVW R1, -0x20(R2) // MOVW R1, -32(R2) // 201002e5 MOVW.P R1, -0x20(R2) // MOVW.P R1, -32(R2) // 201002e4 MOVW.W R1, -0x20(R2) // MOVW.W R1, -32(R2) // 201022e5 - MOVW R1, mov_label_0(SB) // MOVW R1, mov_label_0(SB) - MOVW (R2), R1 // MOVW (R2), R1 // 001092e5 - MOVW.P (R2), R1 // MOVW.P (R2), R1 // 001092e4 - MOVW.W (R2), R1 // MOVW.W (R2), R1 // 0010b2e5 + MOVW R1, mov_label_0(SB) + MOVW (R2), R1 // 001092e5 + MOVW.P (R2), R1 // 001092e4 + MOVW.W (R2), R1 // 0010b2e5 MOVW 0x20(R2), R1 // MOVW 32(R2), R1 // 201092e5 MOVW.P 0x20(R2), R1 // MOVW.P 32(R2), R1 // 201092e4 MOVW.W 0x20(R2), R1 // MOVW.W 32(R2), R1 // 2010b2e5 MOVW -0x20(R2), R1 // MOVW -32(R2), R1 // 201012e5 MOVW.P -0x20(R2), R1 // MOVW.P -32(R2), R1 // 201012e4 MOVW.W -0x20(R2), R1 // MOVW.W -32(R2), R1 // 201032e5 - MOVW mov_label_0(SB), R1 // MOVW mov_label_0(SB), R1 + MOVW mov_label_0(SB), R1 MOVW R1, 0x00ffffff(R2) // MOVW R1, 16777215(R2) - MOVW R1, foo(SB) // MOVW R1, foo(SB) + MOVW R1, foo(SB) MOVW 0x00ffffff(R2), R1 // MOVW 16777215(R2), R1 - MOVW foo(SB), R1 // MOVW foo(SB), R1 - MOVW CPSR, R1 // MOVW CPSR, R1 // 00100fe1 - MOVW R1, CPSR // MOVW R1, CPSR // 01f02ce1 + MOVW foo(SB), R1 + MOVW CPSR, R1 // 00100fe1 + MOVW R1, CPSR // 01f02ce1 MOVW $0xff, CPSR // MOVW $255, CPSR // fff02ce3 MOVW $0xff000000, CPSR // MOVW $4278190080, CPSR // fff42ce3 + MOVW FPSR, R9 // 109af1ee + MOVW FPSR, g // 10aaf1ee + MOVW R9, FPSR // 109ae1ee + MOVW g, FPSR // 10aae1ee + MOVW R0>>28(R1), R2 // 202e91e7 + MOVW R0<<28(R1), R2 // 002e91e7 + MOVW R0->28(R1), R2 // 402e91e7 + MOVW R0@>28(R1), R2 // 602e91e7 + MOVW.U R0>>28(R1), R2 // 202e11e7 + MOVW.U R0<<28(R1), R2 // 002e11e7 + MOVW.U R0->28(R1), R2 // 402e11e7 + MOVW.U R0@>28(R1), R2 // 602e11e7 + MOVW.W R0>>28(R1), R2 // 202eb1e7 + MOVW.W R0<<28(R1), R2 // 002eb1e7 + MOVW.W R0->28(R1), R2 // 402eb1e7 + MOVW.W R0@>28(R1), R2 // 602eb1e7 + MOVW.P R0>>28(g), R2 // 202e9ae6 + MOVW.P R0<<28(g), R2 // 002e9ae6 + MOVW.P R0->28(g), R2 // 402e9ae6 + MOVW.P R0@>28(g), R2 // 602e9ae6 + MOVW R2, R0>>28(R1) // 202e81e7 + MOVW R2, R0<<28(R1) // 002e81e7 + MOVW R2, R0->28(R1) // 402e81e7 + MOVW R2, R0@>28(R1) // 602e81e7 + MOVW.U R2, R0>>28(R1) // 202e01e7 + MOVW.U R2, R0<<28(R1) // 002e01e7 + MOVW.U R2, R0->28(R1) // 402e01e7 + MOVW.U R2, R0@>28(R1) // 602e01e7 + MOVW.W R2, R0>>28(R1) // 202ea1e7 + MOVW.W R2, R0<<28(R1) // 002ea1e7 + MOVW.W R2, R0->28(R1) // 402ea1e7 + MOVW.W R2, R0@>28(R1) // 602ea1e7 + MOVW.P R2, R0>>28(R5) // 202e85e6 + MOVW.P R2, R0<<28(R5) // 002e85e6 + MOVW.P R2, R0->28(R5) // 402e85e6 + MOVW.P R2, R0@>28(R5) // 602e85e6 + MOVW R0, math·Exp(SB) // MOVW R0, math.Exp(SB) + MOVW math·Exp(SB), R0 // MOVW math.Exp(SB), R0 // // END diff --git a/src/cmd/asm/internal/asm/testdata/armerror.s b/src/cmd/asm/internal/asm/testdata/armerror.s index e37bd6e2e7..b3a8da7bed 100644 --- a/src/cmd/asm/internal/asm/testdata/armerror.s +++ b/src/cmd/asm/internal/asm/testdata/armerror.s @@ -19,5 +19,9 @@ TEXT errors(SB),$0 MOVD F0, F1, F2 // ERROR "illegal combination" MOVDF F0, F1, F2 // ERROR "illegal combination" MOVFD F0, F1, F2 // ERROR "illegal combination" + MOVM.IA 4(R1), [R0-R4] // ERROR "offset must be zero" + MOVM.DA 4(R1), [R0-R4] // ERROR "offset must be zero" + MOVM.IB 4(R1), [R0-R4] // ERROR "offset must be zero" + MOVM.DB 4(R1), [R0-R4] // ERROR "offset must be zero" END diff --git a/src/cmd/asm/internal/asm/testdata/armv6.s b/src/cmd/asm/internal/asm/testdata/armv6.s index 23b7b55ff3..7e38ca0846 100644 --- a/src/cmd/asm/internal/asm/testdata/armv6.s +++ b/src/cmd/asm/internal/asm/testdata/armv6.s @@ -41,4 +41,7 @@ TEXT foo(SB), DUPOK|NOSPLIT, $0 CMPF.VS F7 // c07ab56e10faf16e CMPD F6 // c06bb5ee10faf1ee + MOVW R4, F8 // 104b08ee + MOVW F4, R8 // 108b14ee + END diff --git a/src/cmd/internal/obj/arm/asm5.go b/src/cmd/internal/obj/arm/asm5.go index ec6867b2a2..04b1cb7442 100644 --- a/src/cmd/internal/obj/arm/asm5.go +++ b/src/cmd/internal/obj/arm/asm5.go @@ -2201,14 +2201,14 @@ func (c *ctxt5) asmout(p *obj.Prog, o *Optab, out []uint32) { o1 |= (uint32(rf)&15)<<0 | (uint32(rt)&15)<<12 case 56: /* move to FP[CS]R */ - o1 = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0xe<<24 | 1<<8 | 1<<4 + o1 = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0xee1<<16 | 0xa1<<4 - o1 |= ((uint32(p.To.Reg)&1)+1)<<21 | (uint32(p.From.Reg)&15)<<12 + o1 |= (uint32(p.From.Reg) & 15) << 12 case 57: /* move from FP[CS]R */ - o1 = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0xe<<24 | 1<<8 | 1<<4 + o1 = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0xef1<<16 | 0xa1<<4 - o1 |= ((uint32(p.From.Reg)&1)+1)<<21 | (uint32(p.To.Reg)&15)<<12 | 1<<20 + o1 |= (uint32(p.To.Reg) & 15) << 12 case 58: /* movbu R,R */ o1 = c.oprrr(p, AAND, int(p.Scond)) -- 2.50.0