From ee7bb8969a62b12f466f818e4e3d836a2e126940 Mon Sep 17 00:00:00 2001 From: Xiaolin Zhao Date: Wed, 6 Aug 2025 11:07:57 +0800 Subject: [PATCH] cmd/internal/obj/loong64: add support for FSEL instruction Go asm syntax: FSEL FCC, FK, FJ, FD Equivalent platform assembler syntax: fsel fd, fj, fk, ca Change-Id: If75f16fca0adfc03f4952f8a5143d22da33ed425 Reviewed-on: https://go-review.googlesource.com/c/go/+/693457 LUCI-TryBot-Result: Go LUCI Reviewed-by: Meidan Li Reviewed-by: abner chenc Reviewed-by: Dmitri Shuralyov Reviewed-by: Mark Freeman --- src/cmd/asm/internal/asm/testdata/loong64enc1.s | 4 ++++ src/cmd/internal/obj/loong64/a.out.go | 3 +++ src/cmd/internal/obj/loong64/anames.go | 1 + src/cmd/internal/obj/loong64/asm.go | 14 ++++++++++++++ 4 files changed, 22 insertions(+) diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s index 845c1b16be..8990a99557 100644 --- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s +++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s @@ -376,6 +376,10 @@ lable2: FTINTRNEVF F0, F2 // 02e41a01 FTINTRNEVD F0, F2 // 02e81a01 + // FSEL instruction + FSEL FCC0, F1, F2, F3 // 4304000d + FSEL FCC1, F1, F2 // 4284000d + // LDX.{B,BU,H,HU,W,WU,D} instructions MOVB (R14)(R13), R12 // cc350038 MOVBU (R14)(R13), R12 // cc352038 diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go index 46bb0b5b91..f5d20cfabe 100644 --- a/src/cmd/internal/obj/loong64/a.out.go +++ b/src/cmd/internal/obj/loong64/a.out.go @@ -748,6 +748,9 @@ const ( AFTINTRNEVF AFTINTRNEVD + // 3.2.4.2 + AFSEL + // LSX and LASX memory access instructions AVMOVQ AXVMOVQ diff --git a/src/cmd/internal/obj/loong64/anames.go b/src/cmd/internal/obj/loong64/anames.go index 02c392be76..67b5f2fc80 100644 --- a/src/cmd/internal/obj/loong64/anames.go +++ b/src/cmd/internal/obj/loong64/anames.go @@ -264,6 +264,7 @@ var Anames = []string{ "FTINTRNEWD", "FTINTRNEVF", "FTINTRNEVD", + "FSEL", "VMOVQ", "XVMOVQ", "VADDB", diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go index 4e66ddd6cd..1d10ad67d9 100644 --- a/src/cmd/internal/obj/loong64/asm.go +++ b/src/cmd/internal/obj/loong64/asm.go @@ -154,6 +154,9 @@ var optab = []Optab{ {AFMADDF, C_FREG, C_FREG, C_NONE, C_FREG, C_NONE, 37, 4, 0, 0}, {AFMADDF, C_FREG, C_FREG, C_FREG, C_FREG, C_NONE, 37, 4, 0, 0}, + {AFSEL, C_FCCREG, C_FREG, C_FREG, C_FREG, C_NONE, 33, 4, 0, 0}, + {AFSEL, C_FCCREG, C_FREG, C_NONE, C_FREG, C_NONE, 33, 4, 0, 0}, + {AMOVW, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, {AMOVWU, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, {AMOVV, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0}, @@ -1517,6 +1520,7 @@ func buildop(ctxt *obj.Link) { AWORD, APRELD, APRELDX, + AFSEL, obj.ANOP, obj.ATEXT, obj.AFUNCDATA, @@ -2387,6 +2391,16 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) { } o1 = OP_6IRR(c.opirr(p.As), uint32(v), uint32(r), uint32(p.To.Reg)) + case 33: // fsel ca, fk, [fj], fd + ca := uint32(p.From.Reg) + fk := uint32(p.Reg) + fd := uint32(p.To.Reg) + fj := fd + if len(p.RestArgs) > 0 { + fj = uint32(p.GetFrom3().Reg) + } + o1 = 0x340<<18 | (ca&0x7)<<15 | (fk&0x1F)<<10 | (fj&0x1F)<<5 | (fd & 0x1F) + case 34: // mov $con,fr v := c.regoff(&p.From) a := AADDU -- 2.51.0