From f0be3cc5476bd726707985a6382ae6a2d6fa8968 Mon Sep 17 00:00:00 2001 From: Joel Sing Date: Wed, 17 Feb 2021 20:34:34 +1100 Subject: [PATCH] runtime: unbreak linux/riscv64 following regabi merge Unbreak the linux/riscv64 port by storing the zero value register to memory, rather than the current code that is moving a zero intermediate to the stack pointer register (ideally this should be caught by the assembler). This was broken in CL#272568. On riscv64 a zero immediate value cannot be moved directly to memory, rather a register needs to be loaded with zero and then stored. Alternatively, the the zero value register (aka X0) can be used directly. Change-Id: Id57121541d50c9993cec5c2270b638b184ab9bc1 Reviewed-on: https://go-review.googlesource.com/c/go/+/292894 Trust: Joel Sing Reviewed-by: Michael Knyszek Reviewed-by: Cherry Zhang Run-TryBot: Michael Knyszek TryBot-Result: Go Bot --- src/runtime/asm_riscv64.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/runtime/asm_riscv64.s b/src/runtime/asm_riscv64.s index 31e324d677..3d0349471a 100644 --- a/src/runtime/asm_riscv64.s +++ b/src/runtime/asm_riscv64.s @@ -449,7 +449,7 @@ TEXT callRet<>(SB), NOSPLIT, $40-0 MOV A1, 16(X2) MOV A3, 24(X2) MOV A2, 32(X2) - MOV $0, 40(X2) + MOV ZERO, 40(X2) CALL runtime·reflectcallmove(SB) RET -- 2.50.0